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MSP430F233TRGCT
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Texas Instruments Microcontroller Units (MCUs/MPUs/SOCs), VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MSP430F233TRGCT
Texas Instruments · Microcontroller Units (MCUs/MPUs/SOCs) · VQFN-64-EP(9x9)
MSP430F233TRGCT from Texas Instruments, in a VQFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage, positive terminal, supplies all digital parts. |
| 2 | P6.3/A3 | bidirectional | General-purpose digital I/O / analog input A3 of the 12-bit ADC. |
| 3 | P6.4/A4 | bidirectional | General-purpose digital I/O / analog input A4 of the 12-bit ADC. |
| 4 | P6.5/A5 | bidirectional | General-purpose digital I/O / analog input A5 of the 12-bit ADC. |
| 5 | P6.6/A6 | bidirectional | General-purpose digital I/O / analog input A6 of the 12-bit ADC. |
| 6 | P6.7/A7/SVSIN | bidirectional | General-purpose digital I/O / analog input A7 of the 12-bit ADC / SVS input. |
| 7 | VREF+ | power_in | Output of positive terminal of the ADC12 reference voltage. |
| 8 | XIN | input | Input for crystal oscillator XT1; standard or watch crystals can be connected. |
| 9 | XOUT | output | Output terminal of crystal oscillator XT1; standard or watch crystals can be connected. |
| 10 | VeREF+ | input | Input for an external reference voltage. |
| 11 | VREF-/VeREF- | power_in | Negative terminal for the reference voltage, for both internal and externally applied reference. |
| 12 | P1.0/TACLK/CAOUT | bidirectional | General-purpose digital I/O / Timer_A clock input TACLK / Comparator_A output. |
| 13 | P1.1/TA0 | bidirectional | General-purpose digital I/O / Timer_A capture CCI0A input, compare Out0 output / BSL transmit. |
| 14 | P1.2/TA1 | bidirectional | General-purpose digital I/O / Timer_A capture CCI1A input, compare Out1 output. |
| 15 | P1.3/TA2 | bidirectional | General-purpose digital I/O / Timer_A capture CCI2A input, compare Out2 output. |
| 16 | P1.4/SMCLK | bidirectional | General-purpose digital I/O / SMCLK signal output. |
| 17 | P1.5/TA0 | bidirectional | General-purpose digital I/O / Timer_A compare Out0 output. |
| 18 | P1.6/TA1 | bidirectional | General-purpose digital I/O / Timer_A compare Out1 output. |
| 19 | P1.7/TA2 | bidirectional | General-purpose digital I/O / Timer_A compare Out2 output. |
| 20 | P2.0/ACLK/CA2 | bidirectional | General-purpose digital I/O / ACLK output / Comparator_A input. |
| 21 | P2.1/TAINCLK/CA3 | bidirectional | General-purpose digital I/O / Timer_A clock signal at INCLK / Comparator_A input. |
| 22 | P2.2/CAOUT/TA0/CA4 | bidirectional | General-purpose digital I/O / Timer_A capture CCI0B input / Comparator_A output / BSL receive / Comparator_A input. |
| 23 | P2.3/CA0/TA1 | bidirectional | General-purpose digital I/O / Timer_A compare Out1 output / Comparator_A input. |
| 24 | P2.4/CA1/TA2 | bidirectional | General-purpose digital I/O / Timer_A compare Out2 output / Comparator_A input. |
| 25 | P2.5/ROSC/CA5 | bidirectional | General-purpose digital I/O / input for external resistor defining the DCO nominal frequency / Comparator_A input. |
| 26 | P2.6/ADC12CLK/CA6 | bidirectional | General-purpose digital I/O / conversion clock of the 12-bit ADC / Comparator_A input. |
| 27 | P2.7/TA0/CA7 | bidirectional | General-purpose digital I/O / Timer_A compare Out0 output / Comparator_A input. |
| 28 | P3.0/UCB0STE/UCA0CLK | bidirectional | General-purpose digital I/O / USCI_B0 slave transmit enable / USCI_A0 clock input/output. |
| 29 | P3.1/UCB0SIMO/UCB0SDA | bidirectional | General-purpose digital I/O / USCI_B0 slave in master out in SPI mode, SDA I2C data in I2C mode. |
| 30 | P3.2/UCB0SOMI/UCB0SCL | bidirectional | General-purpose digital I/O / USCI_B0 slave out master in in SPI mode, SCL I2C clock in I2C mode. |
| 31 | P3.3/UCB0CLK/UCA0STE | bidirectional | General-purpose digital I/O / USCI_B0 clock input/output, USCI_A0 slave transmit enable. |
| 32 | P3.4/UCA0TXD/UCA0SIMO | bidirectional | General-purpose digital I/O / USCI_A0 transmit data output in UART mode, slave data in/master out in SPI mode. |
| 33 | P3.5/UCA0RXD/UCA0SOMI | bidirectional | General-purpose digital I/O / USCI_A0 receive data input in UART mode, slave data out/master in in SPI mode. |
| 34 | P3.6 | bidirectional | General-purpose digital I/O (no USCI_A1 function on the MSP430F23x). |
| 35 | P3.7 | bidirectional | General-purpose digital I/O (no USCI_A1 function on the MSP430F23x). |
| 36 | P4.0/TB0 | bidirectional | General-purpose digital I/O / Timer_B capture CCI0A/B input, compare Out0 output. |
| 37 | P4.1/TB1 | bidirectional | General-purpose digital I/O / Timer_B capture CCI1A/B input, compare Out1 output. |
| 38 | P4.2/TB2 | bidirectional | General-purpose digital I/O / Timer_B capture CCI2A/B input, compare Out2 output. |
| 39 | P4.3 | bidirectional | General-purpose digital I/O (no Timer_B function on the MSP430F23x). |
| 40 | P4.4 | bidirectional | General-purpose digital I/O (no Timer_B function on the MSP430F23x). |
| 41 | P4.5 | bidirectional | General-purpose digital I/O (no Timer_B function on the MSP430F23x). |
| 42 | P4.6 | bidirectional | General-purpose digital I/O (no Timer_B function on the MSP430F23x). |
| 43 | P4.7/TBCLK | bidirectional | General-purpose digital I/O / Timer_B clock signal TBCLK input. |
| 44 | P5.0 | bidirectional | General-purpose digital I/O (no USCI_B1/A1 function on the MSP430F23x). |
| 45 | P5.1 | bidirectional | General-purpose digital I/O (no USCI_B1 function on the MSP430F23x). |
| 46 | P5.2 | bidirectional | General-purpose digital I/O (no USCI_B1 function on the MSP430F23x). |
| 47 | P5.3 | bidirectional | General-purpose digital I/O (no USCI_B1/A1 function on the MSP430F23x). |
| 48 | P5.4/MCLK | bidirectional | General-purpose digital I/O / main system clock MCLK output. |
| 49 | P5.5/SMCLK | bidirectional | General-purpose digital I/O / submain system clock SMCLK output. |
| 50 | P5.6/ACLK | bidirectional | General-purpose digital I/O / auxiliary clock ACLK output. |
| 51 | P5.7/TBOUTH/SVSOUT | bidirectional | General-purpose digital I/O / switch all PWM digital output ports to high impedance (Timer_B TB0 to TB6) / SVS comparator output. |
| 52 | XT2OUT | output | Output terminal of crystal oscillator XT2. |
| 53 | XT2IN | input | Input port for crystal oscillator XT2. |
| 54 | TDO/TDI | bidirectional | Test data output or programming data input terminal. |
| 55 | TDI/TCLK | input | Test data input or test clock input; the device protection fuse is connected to TDI/TCLK. |
| 56 | TMS | input | Test mode select, input port for device programming and test. |
| 57 | TCK | input | Test clock (JTAG), clock input port for device programming test and bootloader start. |
| 58 | RST/NMI | input | Reset input, non-maskable interrupt input, or bootloader start (in flash devices). |
| 59 | P6.0/A0 | bidirectional | General-purpose digital I/O / analog input A0 of the 12-bit ADC. |
| 60 | P6.1/A1 | bidirectional | General-purpose digital I/O / analog input A1 of the 12-bit ADC. |
| 61 | P6.2/A2 | bidirectional | General-purpose digital I/O / analog input A2 of the 12-bit ADC. |
| 62 | AVSS | power_in | Analog supply voltage, negative terminal, supplies only the analog part of the ADC12. |
| 63 | DVSS | power_in | Digital supply voltage, negative terminal, supplies all digital parts. |
| 64 | AVCC | power_in | Analog supply voltage, positive terminal, supplies only the analog part of the ADC12. |
| 65 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-64-EP(9x9) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 65 |
CAD (KiCad official)
- Symbol:
MSP430F233TRGCT - Footprint:
Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm - 3D model: VQFN-64-EP(9x9) (KiCad packages3D, STEP)
- 3D model files:
msp430f233trgct-etched.step/msp430f233trgct-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430f233trgct.step/msp430f233trgct.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (102 pp, sha256
841108068ef96d3c, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).