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MSP430F2274TRHAR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-40-EP(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430F2274TRHAR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-40-EP(6x6)
MSP430F2274TRHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVSS | power_in | Digital ground reference for the device. |
| 2 | XOUT/P2.7 | bidirectional | Crystal oscillator output terminal or general-purpose digital I/O pin. |
| 3 | XIN/P2.6 | bidirectional | Crystal oscillator input terminal or general-purpose digital I/O pin. |
| 4 | DVSS | power_in | Digital ground reference for the device. |
| 5 | RST/NMI/SBWTDIO | input | Reset or nonmaskable interrupt input; Spy-Bi-Wire test data input/output during programming and test. |
| 6 | P2.0/ACLK/A0/OA0I0 | bidirectional | General-purpose digital I/O pin; ACLK signal output; ADC10 analog input A0; OA0 analog input. |
| 7 | P2.1/TAINCLK/SMCLK/A1/OA0O | bidirectional | General-purpose digital I/O pin; Timer_A clock signal input; SMCLK signal output; ADC10 analog input A1; OA0 analog output. |
| 8 | P2.2/TA0/A2/OA0I1 | bidirectional | General-purpose digital I/O pin; Timer_A capture/compare signal; ADC10 analog input A2; OA0 analog input. |
| 9 | P3.0/UCB0STE/UCA0CLK/A5 | bidirectional | General-purpose digital I/O pin; USCI_B0 slave transmit enable; USCI_A0 clock input/output; ADC10 analog input A5. |
| 10 | P3.1/UCB0SIMO/UCB0SDA | bidirectional | General-purpose digital I/O pin; USCI_B0 SPI slave in/master out or I2C SDA data line. |
| 11 | P3.2/UCB0SOMI/UCB0SCL | bidirectional | General-purpose digital I/O pin; USCI_B0 SPI slave out/master in or I2C SCL clock line. |
| 12 | P3.3/UCB0CLK/UCA0STE | bidirectional | General-purpose digital I/O pin; USCI_B0 clock input/output; USCI_A0 slave transmit enable. |
| 13 | AVSS | power_in | Analog ground reference for ADC10, operational amplifiers, and reference circuits. |
| 14 | AVCC | power_in | Analog supply voltage (1.8V to 3.6V) for ADC10, operational amplifiers, and reference circuits. |
| 15 | P4.0/TB0 | bidirectional | General-purpose digital I/O pin; Timer_B capture/compare input or output. |
| 16 | P4.1/TB1 | bidirectional | General-purpose digital I/O pin; Timer_B capture/compare input or output. |
| 17 | P4.2/TB2 | bidirectional | General-purpose digital I/O pin; Timer_B capture/compare input or output. |
| 18 | P4.3/TB0/A12/OA0O | bidirectional | General-purpose digital I/O pin; Timer_B capture/compare signal; ADC10 analog input A12; OA0 analog output. |
| 19 | P4.4/TB1/A13/OA1O | bidirectional | General-purpose digital I/O pin; Timer_B capture/compare signal; ADC10 analog input A13; OA1 analog output. |
| 20 | P4.5/TB2/A14/OA0I3 | bidirectional | General-purpose digital I/O pin; Timer_B output; ADC10 analog input A14; OA0 analog input. |
| 21 | P4.6/TBOUTH/A15/OA1I3 | bidirectional | General-purpose digital I/O pin; Timer_B switch all TB0-TB3 outputs to high impedance; ADC10 analog input A15; OA1 analog input. |
| 22 | P4.7/TBCLK | bidirectional | General-purpose digital I/O pin; Timer_B clock signal input. |
| 23 | P3.4/UCA0TXD/UCA0SIMO | bidirectional | General-purpose digital I/O pin; USCI_A0 UART transmit data output or SPI slave in/master out. |
| 24 | P3.5/UCA0RXD/UCA0SOMI | bidirectional | General-purpose digital I/O pin; USCI_A0 UART receive data input or SPI slave out/master in. |
| 25 | P3.6/A6/OA0I2 | bidirectional | General-purpose digital I/O pin; ADC10 analog input A6; OA0 analog input. |
| 26 | P3.7/A7/OA1I2 | bidirectional | General-purpose digital I/O pin; ADC10 analog input A7; OA1 analog input. |
| 27 | P2.3/TA1/A3/VREF−/VeREF−/OA1I1/OA1O | bidirectional | General-purpose digital I/O pin; Timer_A capture/compare signal; ADC10 analog input A3; negative reference voltage input; OA1 analog input/output. |
| 28 | P2.4/TA2/A4/VREF+/VeREF+/OA1I0 | bidirectional | General-purpose digital I/O pin; Timer_A output; ADC10 analog input A4; positive reference voltage output or input; OA1 analog input. |
| 29 | P1.0/TACLK/ADC10CLK | bidirectional | General-purpose digital I/O pin; Timer_A clock signal input or ADC10 conversion clock. |
| 30 | P1.1/TA0 | bidirectional | General-purpose digital I/O pin; Timer_A capture/compare signal or output. |
| 31 | P1.2/TA1 | bidirectional | General-purpose digital I/O pin; Timer_A capture/compare signal or output. |
| 32 | P1.3/TA2 | bidirectional | General-purpose digital I/O pin; Timer_A capture/compare signal or output. |
| 33 | P1.4/SMCLK/TCK | bidirectional | General-purpose digital I/O pin; SMCLK output signal; test clock input for JTAG programming and test. |
| 34 | P1.5/TA0/TMS | bidirectional | General-purpose digital I/O pin; Timer_A output; test mode select input for JTAG programming and test. |
| 35 | P1.6/TA1/TDI/TCLK | bidirectional | General-purpose digital I/O pin; Timer_A output; test data input or test clock input for JTAG. |
| 36 | P1.7/TA2/TDO/TDI | bidirectional | General-purpose digital I/O pin; Timer_A output; JTAG test data output or test data input (function controlled by JTAG instruction). |
| 37 | TEST/SBWTCK | input | Test mode select input for JTAG; Spy-Bi-Wire test clock input during programming and test; device protection fuse connected to this pin. |
| 38 | DVCC | power_in | Digital supply voltage (1.8V to 3.6V) for CPU, memory, and digital logic. |
| 39 | DVCC | power_in | Digital supply voltage (1.8V to 3.6V) for CPU, memory, and digital logic. |
| 40 | P2.5/ROSC | passive | General-purpose digital I/O pin or external resistor input to define DCO frequency for internal oscillator. |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-40-EP(6x6) |
| Category | Embedded Processors & Controllers |
| Pins | 41 |
CAD (KiCad official)
- Symbol:
MSP430F2274TRHAR - Footprint:
Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm - 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files:
msp430f2274trhar-etched.step/msp430f2274trhar-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430f2274trhar.step/msp430f2274trhar.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (99 pp, sha256
eeb41b5847372438, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).