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MSP430F2013IPWR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430F2013IPWR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-14
MSP430F2013IPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Supply voltage; 1.8 V to 3.6 V operating range during program execution, 2.2 V to 3.6 V during flash program/erase. |
| 2 | P1.0/TACLK/ACLK/A0+ | bidirectional | General-purpose digital I/O pin; Timer_A clock signal TACLK input; ACLK signal output; SD16_A positive analog input A0. |
| 3 | P1.1/TA0/A0-/A4+ | bidirectional | General-purpose digital I/O pin; Timer_A capture CCI0A input and compare TA0 output; SD16_A negative analog input A0- and positive analog input A4+. |
| 4 | P1.2/TA1/A1+/A4- | bidirectional | General-purpose digital I/O pin; Timer_A capture CCI1A input and compare TA1 output; SD16_A positive analog input A1+ and negative analog input A4-. |
| 5 | P1.3/VREF/A1- | bidirectional | General-purpose digital I/O pin; input for external reference voltage or internal reference voltage output (VREF); SD16_A negative analog input A1-. |
| 6 | P1.4/SMCLK/A2+/TCK | bidirectional | General-purpose digital I/O pin; SMCLK signal output; SD16_A positive analog input A2+; JTAG test clock input. |
| 7 | P1.5/TA0/A2-/SCLK/TMS | bidirectional | General-purpose digital I/O pin; Timer_A compare TA0 output; SD16_A negative analog input A2-; USI external clock input in SPI/I2C mode; JTAG test mode select input. |
| 8 | P1.6/TA1/A3+/SDO/SCL/TDI/TCLK | bidirectional | General-purpose digital I/O pin; Timer_A capture CCI1B input and compare TA1 output; SD16_A positive analog input A3+; USI data output in SPI mode and I2C clock; JTAG test data input. |
| 9 | P1.7/A3-/SDI/SDA/TDO/TDI | bidirectional | General-purpose digital I/O pin; SD16_A negative analog input A3-; USI data input in SPI mode and I2C data; JTAG test data output or input. |
| 10 | RST/NMI/SBWTDIO | input | Reset or nonmaskable interrupt input; Spy-Bi-Wire test data input/output during programming and test. |
| 11 | TEST/SBWTCK | input | Test mode select for JTAG pins; Spy-Bi-Wire test clock input during programming and test; device protection fuse connected. |
| 12 | XOUT/P2.7 | bidirectional | Crystal oscillator output terminal or general-purpose digital I/O pin; excess current flows if used as input until P2SEL.7 is cleared. |
| 13 | XIN/P2.6/TA1 | bidirectional | Crystal oscillator input terminal or general-purpose digital I/O pin; Timer_A compare TA1 output. |
| 14 | VSS | power_in | Ground reference (0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
MSP430F2013IPWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
msp430f2013ipwr-etched.step/msp430f2013ipwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430f2013ipwr.step/msp430f2013ipwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (104 pp, sha256
f41a8064a9540aa9, retrieved 2026-09-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).