# MSP430F2011TPWR

**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · TSSOP-14

MSP430F2011TPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Supply voltage, specified for the 1.8 V to 3.6 V low supply voltage range. |
| 2 | P1.0/TACLK/ACLK/CA0 | bidirectional | General-purpose digital I/O pin that also serves as Timer_A TACLK/INCLK input, ACLK signal output, and Comparator_A+ CA0 input. |
| 3 | P1.1/TA0/CA1 | bidirectional | General-purpose digital I/O pin that also serves as Timer_A CCI0A capture input or Out0 compare output and Comparator_A+ CA1 input. |
| 4 | P1.2/TA1/CA2 | bidirectional | General-purpose digital I/O pin that also serves as Timer_A CCI1A capture input or Out1 compare output and Comparator_A+ CA2 input. |
| 5 | P1.3/CAOUT/CA3 | bidirectional | General-purpose digital I/O pin that also serves as Comparator_A+ output (CAOUT) and CA3 input. |
| 6 | P1.4/SMCLK/CA4/TCK | bidirectional | General-purpose digital I/O pin that also serves as SMCLK signal output, Comparator_A+ CA4 input, and JTAG test clock (TCK) input for device programming and test. |
| 7 | P1.5/TA0/CA5/TMS | bidirectional | General-purpose digital I/O pin that also serves as Timer_A Out0 compare output, Comparator_A+ CA5 input, and JTAG test mode select (TMS) input for device programming and test. |
| 8 | P1.6/TA1/CA6/TDI/TCLK | bidirectional | General-purpose digital I/O pin that also serves as Timer_A Out1 compare output, Comparator_A+ CA6 input, and JTAG test data input or test clock input during programming and test. |
| 9 | P1.7/CAOUT/CA7/TDO/TDI | bidirectional | General-purpose digital I/O pin that also serves as Comparator_A+ output (CAOUT) and CA7 input, and as JTAG test data output (TDO) or test data input (TDI), selected via JTAG instruction. |
| 10 | RST/NMI/SBWTDIO | input | Reset or nonmaskable interrupt input, and Spy-Bi-Wire test data input/output during programming and test. |
| 11 | TEST/SBWTCK | input | Selects test mode for the JTAG pins on Port 1 (the device protection fuse is connected to TEST), and serves as Spy-Bi-Wire test clock input during programming and test. |
| 12 | XOUT/P2.7 | bidirectional | Output terminal of the crystal oscillator, also usable as general-purpose digital I/O pin P2.7; if used as an input, excess current flows until P2SEL.7 is cleared. |
| 13 | XIN/P2.6/TA1 | bidirectional | Input terminal of the crystal oscillator, also usable as general-purpose digital I/O pin P2.6 or Timer_A Out1 compare output; used as digital clock input when LFXT1Sx in BCSCTL3 is set to 11. |
| 14 | VSS | power_in | Ground reference. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `MSP430F2011TPWR`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `msp430f2011tpwr-etched.step` / `msp430f2011tpwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430f2011tpwr.step` / `msp430f2011tpwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430f2012) (104 pp, sha256 `f41a8064a9540aa9`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/msp430f2011tpwr-datasheet.pdf)