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MSP430F2003IPWR

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Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MSP430F2003IPWR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-14

MSP430F2003IPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Supply voltage terminal; the device operates from a 1.8 V to 3.6 V supply range.
2 P1.0/TACLK/ACLK/A0+ bidirectional General-purpose digital I/O with Timer_A TACLK input and ACLK output, and SD16_A positive analog input A0.
3 P1.1/TA0/A0-/A4+ bidirectional General-purpose digital I/O with Timer_A CCI0A input and TA0 output, and SD16_A negative analog input A0 and positive analog input A4.
4 P1.2/TA1/A1+/A4- bidirectional General-purpose digital I/O with Timer_A CCI1A input and TA1 output, and SD16_A positive analog input A1 and negative analog input A4.
5 P1.3/VREF/A1- bidirectional General-purpose digital I/O that can also serve as an external reference input or internal reference voltage output (usable as mid-voltage), and SD16_A negative analog input A1.
6 P1.4/SMCLK/A2+/TCK bidirectional General-purpose digital I/O with SMCLK output and SD16_A positive analog input A2; serves as JTAG test clock (TCK) input for device programming and test.
7 P1.5/TA0/A2-/SCLK/TMS bidirectional General-purpose digital I/O with Timer_A TA0 output, SD16_A negative analog input A2, and USI clock in SPI/I2C mode; serves as JTAG test mode select (TMS) input.
8 P1.6/TA1/A3+/SDO/SCL/TDI/TCLK bidirectional General-purpose digital I/O with Timer_A TA1 output and SD16_A positive analog input A3; USI data output in SPI mode or I2C clock in I2C mode; JTAG TDI or TCLK input during programming and test.
9 P1.7/A3-/SDI/SDA/TDO/TDI bidirectional General-purpose digital I/O with SD16_A negative analog input A3; USI data input in SPI mode or I2C data in I2C mode; JTAG TDO or TDI output/input during programming and test, selected via JTAG instruction.
10 RST/NMI/SBWTDIO input Reset or nonmaskable interrupt input, and Spy-Bi-Wire test data input/output during programming and test.
11 TEST/SBWTCK input Selects test mode for the JTAG pins on Port 1; the device protection fuse is connected to TEST, and it also serves as the Spy-Bi-Wire test clock input during programming and test.
12 XOUT/P2.7 bidirectional Output terminal of the crystal oscillator, or general-purpose digital I/O P2.7; if used as an input, excess current flows until P2SEL.7 is cleared because of the oscillator output driver connection after reset.
13 XIN/P2.6/TA1 bidirectional Input terminal of the crystal oscillator, or general-purpose digital I/O P2.6 with Timer_A TA1 compare Out1 output.
14 VSS power_in Ground reference terminal for the device.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Embedded Processors & Controllers
Pins 14

CAD (KiCad official)

  • Symbol: MSP430F2003IPWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: msp430f2003ipwr-etched.step / msp430f2003ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f2003ipwr.step / msp430f2003ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (104 pp, sha256 f41a8064a9540aa9, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF