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MSP430F1612IRTDT
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), QFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430F1612IRTDT
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · QFN-64-EP(9x9)
MSP430F1612IRTDT from Texas Instruments, in a QFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage, positive terminal; supplies all digital parts of the device. |
| 2 | P6.3/A3 | bidirectional | General-purpose digital I/O pin with analog input A3 of the 12-bit ADC. |
| 3 | P6.4/A4 | bidirectional | General-purpose digital I/O pin with analog input A4 of the 12-bit ADC. |
| 4 | P6.5/A5 | bidirectional | General-purpose digital I/O pin with analog input A5 of the 12-bit ADC. |
| 5 | P6.6/A6/DAC0 | bidirectional | General-purpose digital I/O pin with analog input A6 of the 12-bit ADC and DAC12.0 output. |
| 6 | P6.7/A7/DAC1/SVSIN | bidirectional | General-purpose digital I/O pin with analog input A7 of the 12-bit ADC, DAC12.1 output, and SVS input. |
| 7 | VREF+ | power_in | Output of the positive terminal of the ADC12 reference voltage. |
| 8 | XIN | input | Input port for crystal oscillator XT1; standard or watch crystals can be connected. |
| 9 | XOUT | output | Output terminal of crystal oscillator XT1. |
| 10 | VeREF+ | input | Input for an external reference voltage. |
| 11 | VREF−/VeREF− | power_in | Negative terminal for the reference voltage, either the internal reference or an externally applied reference voltage. |
| 12 | P1.0/TACLK | bidirectional | General-purpose digital I/O pin with Timer_A clock signal TACLK input. |
| 13 | P1.1/TA0 | bidirectional | General-purpose digital I/O pin with Timer_A CCI0A capture input, Out0 compare output, and BSL transmit. |
| 14 | P1.2/TA1 | bidirectional | General-purpose digital I/O pin with Timer_A CCI1A capture input and Out1 compare output. |
| 15 | P1.3/TA2 | bidirectional | General-purpose digital I/O pin with Timer_A CCI2A capture input and Out2 compare output. |
| 16 | P1.4/SMCLK | bidirectional | General-purpose digital I/O pin with SMCLK signal output. |
| 17 | P1.5/TA0 | bidirectional | General-purpose digital I/O pin with Timer_A compare Out0 output. |
| 18 | P1.6/TA1 | bidirectional | General-purpose digital I/O pin with Timer_A compare Out1 output. |
| 19 | P1.7/TA2 | bidirectional | General-purpose digital I/O pin with Timer_A compare Out2 output. |
| 20 | P2.0/ACLK | bidirectional | General-purpose digital I/O pin with ACLK output. |
| 21 | P2.1/TAINCLK | bidirectional | General-purpose digital I/O pin with Timer_A clock signal at INCLK. |
| 22 | P2.2/CAOUT/TA0 | bidirectional | General-purpose digital I/O pin with Timer_A CCI0B capture input, Comparator_A output, and BSL receive. |
| 23 | P2.3/CA0/TA1 | bidirectional | General-purpose digital I/O pin with Timer_A compare Out1 output and Comparator_A input. |
| 24 | P2.4/CA1/TA2 | bidirectional | General-purpose digital I/O pin with Timer_A compare Out2 output and Comparator_A input. |
| 25 | P2.5/ROSC | bidirectional | General-purpose digital I/O pin and input for an external resistor defining the DCO nominal frequency. |
| 26 | P2.6/ADC12CLK/DMAE0 | bidirectional | General-purpose digital I/O pin with 12-bit ADC conversion clock and DMA channel 0 external trigger. |
| 27 | P2.7/TA0 | bidirectional | General-purpose digital I/O pin with Timer_A compare Out0 output. |
| 28 | P3.0/STE0 | bidirectional | General-purpose digital I/O pin with USART0 slave transmit enable in SPI mode. |
| 29 | P3.1/SIMO0/SDA | bidirectional | General-purpose digital I/O pin with USART0 SPI slave-in/master-out and I2C data. |
| 30 | P3.2/SOMI0 | bidirectional | General-purpose digital I/O pin with USART0 SPI slave-out/master-in. |
| 31 | P3.3/UCLK0/SCL | bidirectional | General-purpose digital I/O pin with USART0 external clock input or output in UART/SPI mode and I2C clock. |
| 32 | P3.4/UTXD0 | bidirectional | General-purpose digital I/O pin with USART0 UART transmit data output. |
| 33 | P3.5/URXD0 | bidirectional | General-purpose digital I/O pin with USART0 UART receive data input. |
| 34 | P3.6/UTXD1 | bidirectional | General-purpose digital I/O pin with USART1 UART transmit data output (16x/161x devices). |
| 35 | P3.7/URXD1 | bidirectional | General-purpose digital I/O pin with USART1 UART receive data input (16x/161x devices). |
| 36 | P4.0/TB0 | bidirectional | General-purpose digital I/O pin with Timer_B CCI0A/B capture input and Out0 compare output. |
| 37 | P4.1/TB1 | bidirectional | General-purpose digital I/O pin with Timer_B CCI1A/B capture input and Out1 compare output. |
| 38 | P4.2/TB2 | bidirectional | General-purpose digital I/O pin with Timer_B CCI2A/B capture input and Out2 compare output. |
| 39 | P4.3/TB3 | bidirectional | General-purpose digital I/O pin with Timer_B CCI3A/B capture input and Out3 compare output (16x/161x devices). |
| 40 | P4.4/TB4 | bidirectional | General-purpose digital I/O pin with Timer_B CCI4A/B capture input and Out4 compare output (16x/161x devices). |
| 41 | P4.5/TB5 | bidirectional | General-purpose digital I/O pin with Timer_B CCI5A/B capture input and Out5 compare output (16x/161x devices). |
| 42 | P4.6/TB6 | bidirectional | General-purpose digital I/O pin with Timer_B CCI6A capture input and Out6 compare output (16x/161x devices). |
| 43 | P4.7/TBCLK | bidirectional | General-purpose digital I/O pin with Timer_B clock signal TBCLK input. |
| 44 | P5.0/STE1 | bidirectional | General-purpose digital I/O pin with USART1 slave transmit enable in SPI mode (16x/161x devices). |
| 45 | P5.1/SIMO1 | bidirectional | General-purpose digital I/O pin with USART1 SPI slave-in/master-out (16x/161x devices). |
| 46 | P5.2/SOMI1 | bidirectional | General-purpose digital I/O pin with USART1 SPI slave-out/master-in (16x/161x devices). |
| 47 | P5.3/UCLK1 | bidirectional | General-purpose digital I/O pin with USART1 external clock input or output in UART/SPI mode (16x/161x devices). |
| 48 | P5.4/MCLK | bidirectional | General-purpose digital I/O pin with MCLK main system clock output. |
| 49 | P5.5/SMCLK | bidirectional | General-purpose digital I/O pin with SMCLK submain system clock output. |
| 50 | P5.6/ACLK | bidirectional | General-purpose digital I/O pin with ACLK auxiliary clock output. |
| 51 | P5.7/TBOUTH/SVSOUT | bidirectional | General-purpose digital I/O pin; switches all Timer_B PWM outputs to high impedance and carries the SVS comparator output. |
| 52 | XT2OUT | output | Output terminal of crystal oscillator XT2 (standard crystals only). |
| 53 | XT2IN | input | Input port for crystal oscillator XT2; only standard crystals can be connected. |
| 54 | TDO/TDI | bidirectional | Test data output port; carries TDO/TDI data output or programming data input. |
| 55 | TDI/TCLK | input | Test data input or test clock input; the device protection fuse is connected to this pin. |
| 56 | TMS | input | Test mode select; used as an input port for device programming and test. |
| 57 | TCK | input | Test clock; clock input port for device programming, test, and bootstrap loader start. |
| 58 | RST/NMI | input | Reset input, nonmaskable interrupt input port, or bootstrap loader start in Flash devices. |
| 59 | P6.0/A0 | bidirectional | General-purpose digital I/O pin with analog input A0 of the 12-bit ADC. |
| 60 | P6.1/A1 | bidirectional | General-purpose digital I/O pin with analog input A1 of the 12-bit ADC. |
| 61 | P6.2/A2 | bidirectional | General-purpose digital I/O pin with analog input A2 of the 12-bit ADC. |
| 62 | AVSS | power_in | Analog supply voltage, negative terminal; supplies only the analog portion of ADC12 and DAC12. |
| 63 | DVSS | power_in | Digital supply voltage, negative terminal; supplies all digital parts of the device. |
| 64 | AVCC | power_in | Analog supply voltage, positive terminal; supplies only the analog portion of ADC12 and DAC12. |
| 65 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-64-EP(9x9) |
| Category | Embedded Processors & Controllers |
| Pins | 65 |
CAD (KiCad official)
- Symbol:
MSP430F1612IRTDT - Footprint:
Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm - 3D model: QFN-64-EP(9x9) (KiCad packages3D, STEP)
- 3D model files:
msp430f1612irtdt-etched.step/msp430f1612irtdt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430f1612irtdt.step/msp430f1612irtdt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (85 pp, sha256
697b9cb106833560, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).