# MSP430F157IPMR

**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

MSP430F157IPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage, positive terminal, supplying all digital parts (device supply range 1.8 V to 3.6 V). |
| 2 | P6.3/A3 | bidirectional | General-purpose digital I/O pin and analog input A3 of the 12-bit ADC. |
| 3 | P6.4/A4 | bidirectional | General-purpose digital I/O pin and analog input A4 of the 12-bit ADC. |
| 4 | P6.5/A5 | bidirectional | General-purpose digital I/O pin and analog input A5 of the 12-bit ADC. |
| 5 | P6.6/A6/DAC0 | bidirectional | General-purpose digital I/O pin, analog input A6 of the 12-bit ADC, and DAC12.0 output. |
| 6 | P6.7/A7/DAC1/SVSIN | bidirectional | General-purpose digital I/O pin, analog input A7 of the 12-bit ADC, DAC12.1 output, and SVS input. |
| 7 | VREF+ | power_in | Output of the positive terminal of the reference voltage in the ADC12. |
| 8 | XIN | input | Input port for crystal oscillator XT1; standard or watch crystals can be connected. |
| 9 | XOUT | output | Output terminal of crystal oscillator XT1. |
| 10 | VeREF+ | input | Input for an external reference voltage. |
| 11 | VREF−/VeREF− | power_in | Negative terminal for the reference voltage, either the internal reference voltage or an externally applied reference voltage. |
| 12 | P1.0/TACLK | bidirectional | General-purpose digital I/O pin and Timer_A clock signal TACLK input. |
| 13 | P1.1/TA0 | bidirectional | General-purpose digital I/O pin, Timer_A capture CCI0A input or compare Out0 output, and BSL transmit. |
| 14 | P1.2/TA1 | bidirectional | General-purpose digital I/O pin, Timer_A capture CCI1A input or compare Out1 output. |
| 15 | P1.3/TA2 | bidirectional | General-purpose digital I/O pin, Timer_A capture CCI2A input or compare Out2 output. |
| 16 | P1.4/SMCLK | bidirectional | General-purpose digital I/O pin and SMCLK signal output. |
| 17 | P1.5/TA0 | bidirectional | General-purpose digital I/O pin and Timer_A compare Out0 output. |
| 18 | P1.6/TA1 | bidirectional | General-purpose digital I/O pin and Timer_A compare Out1 output. |
| 19 | P1.7/TA2 | bidirectional | General-purpose digital I/O pin and Timer_A compare Out2 output. |
| 20 | P2.0/ACLK | bidirectional | General-purpose digital I/O pin and ACLK output. |
| 21 | P2.1/TAINCLK | bidirectional | General-purpose digital I/O pin and Timer_A clock signal at INCLK. |
| 22 | P2.2/CAOUT/TA0 | bidirectional | General-purpose digital I/O pin, Timer_A capture CCI0B input, Comparator_A output, and BSL receive. |
| 23 | P2.3/CA0/TA1 | bidirectional | General-purpose digital I/O pin, Timer_A compare Out1 output, and Comparator_A input CA0. |
| 24 | P2.4/CA1/TA2 | bidirectional | General-purpose digital I/O pin, Timer_A compare Out2 output, and Comparator_A input CA1. |
| 25 | P2.5/ROSC | bidirectional | General-purpose digital I/O pin and input for an external resistor that defines the DCO nominal frequency. |
| 26 | P2.6/ADC12CLK/DMAE0 | bidirectional | General-purpose digital I/O pin, ADC12 conversion clock, and DMA channel 0 external trigger. |
| 27 | P2.7/TA0 | bidirectional | General-purpose digital I/O pin and Timer_A compare Out0 output. |
| 28 | P3.0/STE0 | bidirectional | General-purpose digital I/O pin and slave transmit enable for USART0 in SPI mode. |
| 29 | P3.1/SIMO0/SDA | bidirectional | General-purpose digital I/O pin, USART0 SPI slave-in/master-out, and I2C data in USART0 I2C mode. |
| 30 | P3.2/SOMI0 | bidirectional | General-purpose digital I/O pin and USART0 SPI slave-out/master-in. |
| 31 | P3.3/UCLK0/SCL | bidirectional | General-purpose digital I/O pin, USART0 external clock input or clock output, and I2C clock in USART0 I2C mode. |
| 32 | P3.4/UTXD0 | bidirectional | General-purpose digital I/O pin and USART0 transmit data output in UART mode. |
| 33 | P3.5/URXD0 | bidirectional | General-purpose digital I/O pin and USART0 receive data input in UART mode. |
| 34 | P3.6 | bidirectional | General-purpose digital I/O pin only on this 15x device; the USART1 UTXD1 function is listed for 16x/161x devices only. |
| 35 | P3.7 | bidirectional | General-purpose digital I/O pin only on this 15x device; the USART1 URXD1 function is listed for 16x/161x devices only. |
| 36 | P4.0/TB0 | bidirectional | General-purpose digital I/O pin, Timer_B capture CCI0A/B input, or compare Out0 output. |
| 37 | P4.1/TB1 | bidirectional | General-purpose digital I/O pin, Timer_B capture CCI1A/B input, or compare Out1 output. |
| 38 | P4.2/TB2 | bidirectional | General-purpose digital I/O pin, Timer_B capture CCI2A/B input, or compare Out2 output. |
| 39 | P4.3 | bidirectional | General-purpose digital I/O pin only on this 15x device; the Timer_B TB3 function is listed for 16x/161x devices only. |
| 40 | P4.4 | bidirectional | General-purpose digital I/O pin only on this 15x device; the Timer_B TB4 function is listed for 16x/161x devices only. |
| 41 | P4.5 | bidirectional | General-purpose digital I/O pin only on this 15x device; the Timer_B TB5 function is listed for 16x/161x devices only. |
| 42 | P4.6 | bidirectional | General-purpose digital I/O pin only on this 15x device; the Timer_B TB6 function is listed for 16x/161x devices only. |
| 43 | P4.7/TBCLK | bidirectional | General-purpose digital I/O pin and Timer_B clock signal TBCLK input. |
| 44 | P5.0 | bidirectional | General-purpose digital I/O pin only on this 15x device; the USART1 STE1 function is listed for 16x/161x devices only. |
| 45 | P5.1 | bidirectional | General-purpose digital I/O pin only on this 15x device; the USART1 SIMO1 function is listed for 16x/161x devices only. |
| 46 | P5.2 | bidirectional | General-purpose digital I/O pin only on this 15x device; the USART1 SOMI1 function is listed for 16x/161x devices only. |
| 47 | P5.3 | bidirectional | General-purpose digital I/O pin only on this 15x device; the USART1 UCLK1 function is listed for 16x/161x devices only. |
| 48 | P5.4/MCLK | bidirectional | General-purpose digital I/O pin and main system clock MCLK output. |
| 49 | P5.5/SMCLK | bidirectional | General-purpose digital I/O pin and submain system clock SMCLK output. |
| 50 | P5.6/ACLK | bidirectional | General-purpose digital I/O pin and auxiliary clock ACLK output. |
| 51 | P5.7/TBOUTH/SVSOUT | bidirectional | General-purpose digital I/O pin, switches all Timer_B PWM outputs to high impedance (TBOUTH), and carries the SVS comparator output. |
| 52 | XT2OUT | output | Output terminal of crystal oscillator XT2. |
| 53 | XT2IN | input | Input port for crystal oscillator XT2; only standard crystals can be connected. |
| 54 | TDO/TDI | bidirectional | Test data output port, carrying TDO/TDI data output or the programming data input terminal. |
| 55 | TDI/TCLK | input | Test data input or test clock input; the device protection fuse is connected to this pin. |
| 56 | TMS | input | Test mode select; used as an input port for device programming and test. |
| 57 | TCK | input | Test clock; clock input port for device programming and test and for bootstrap loader start. |
| 58 | RST/NMI | input | Reset input, nonmaskable interrupt input port, or bootstrap loader start in flash devices. |
| 59 | P6.0/A0 | bidirectional | General-purpose digital I/O pin and analog input A0 of the 12-bit ADC. |
| 60 | P6.1/A1 | bidirectional | General-purpose digital I/O pin and analog input A1 of the 12-bit ADC. |
| 61 | P6.2/A2 | bidirectional | General-purpose digital I/O pin and analog input A2 of the 12-bit ADC. |
| 62 | AVSS | power_in | Analog supply voltage, negative terminal, supplying only the analog portion of ADC12 and DAC12. |
| 63 | DVSS | power_in | Digital supply voltage, negative terminal, supplying all digital parts. |
| 64 | AVCC | power_in | Analog supply voltage, positive terminal, supplying only the analog portion of ADC12 and DAC12. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |

## CAD (KiCad official)

- Symbol: `MSP430F157IPMR`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `msp430f157ipmr-etched.step` / `msp430f157ipmr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430f157ipmr.step` / `msp430f157ipmr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430f167) (85 pp, sha256 `697b9cb106833560`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/msp430f157ipmr-datasheet.pdf)