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MSP430F149IPM
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430F149IPM
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
MSP430F149IPM from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage positive terminal, 1.8V to 3.6V nominal, supplies all digital parts. |
| 2 | P6.3/A3 | bidirectional | General-purpose digital I/O pin or analog input A3 to 12-bit ADC. |
| 3 | P6.4/A4 | bidirectional | General-purpose digital I/O pin or analog input A4 to 12-bit ADC. |
| 4 | P6.5/A5 | bidirectional | General-purpose digital I/O pin or analog input A5 to 12-bit ADC. |
| 5 | P6.6/A6 | bidirectional | General-purpose digital I/O pin or analog input A6 to 12-bit ADC. |
| 6 | P6.7/A7 | bidirectional | General-purpose digital I/O pin or analog input A7 to 12-bit ADC. |
| 7 | VREF+ | power_in | ADC reference voltage positive terminal output. |
| 8 | XIN | input | Crystal oscillator XT1 input for standard or watch crystals. |
| 9 | XOUT | output | Crystal oscillator XT1 output terminal. |
| 10 | VeREF+ | input | External reference voltage input to ADC. |
| 11 | VREF−/VeREF− | power_in | ADC reference voltage negative terminal for internal or external reference sources. |
| 12 | P1.0/TACLK | bidirectional | General-purpose I/O or Timer_A clock input TACLK. |
| 13 | P1.1/TA0 | bidirectional | General-purpose I/O, Timer_A capture CCI0A, compare Out0, or BSL transmit. |
| 14 | P1.2/TA1 | bidirectional | General-purpose I/O, Timer_A capture CCI1A, compare Out1, or BSL transmit. |
| 15 | P1.3/TA2 | bidirectional | General-purpose I/O, Timer_A capture CCI2A or compare Out2. |
| 16 | P1.4/SMCLK | bidirectional | General-purpose I/O or submain system clock SMCLK output. |
| 17 | P1.5/TA0 | bidirectional | General-purpose I/O or Timer_A compare Out0. |
| 18 | P1.6/TA1 | bidirectional | General-purpose I/O or Timer_A compare Out1. |
| 19 | P1.7/TA2 | bidirectional | General-purpose I/O or Timer_A compare Out2. |
| 20 | P2.0/ACLK | bidirectional | General-purpose I/O or auxiliary clock ACLK output. |
| 21 | P2.1/TAINCLK | bidirectional | General-purpose I/O or Timer_A clock input INCLK. |
| 22 | P2.2/CAOUT/TA0 | bidirectional | General-purpose I/O, Comparator_A output, Timer_A capture CCI0B, or BSL receive. |
| 23 | P2.3/CA0/TA1 | bidirectional | General-purpose I/O, Timer_A compare Out1, or Comparator_A input. |
| 24 | P2.4/CA1/TA2 | bidirectional | General-purpose I/O, Timer_A compare Out2, or Comparator_A input. |
| 25 | P2.5/ROSC | bidirectional | General-purpose I/O or external resistor input for DCO frequency tuning. |
| 26 | P2.6/ADC12CLK | bidirectional | General-purpose I/O or ADC12 conversion clock input. |
| 27 | P2.7/TA0 | bidirectional | General-purpose I/O or Timer_A compare Out0. |
| 28 | P3.0/STE0 | bidirectional | General-purpose I/O or USART0 slave transmit enable in SPI mode. |
| 29 | P3.1/SIMO0 | bidirectional | General-purpose I/O or USART0 slave in/master out in SPI mode. |
| 30 | P3.2/SOMI0 | bidirectional | General-purpose I/O or USART0 slave out/master in in SPI mode. |
| 31 | P3.3/UCLK0 | bidirectional | General-purpose I/O, USART0 clock input in UART/SPI mode or output in SPI master mode. |
| 32 | P3.4/UTXD0 | bidirectional | General-purpose I/O or USART0 transmit data output in UART mode. |
| 33 | P3.5/URXD0 | bidirectional | General-purpose I/O or USART0 receive data input in UART mode. |
| 34 | P3.6/UTXD1 | bidirectional | General-purpose I/O or USART1 transmit data output in UART mode (MSP430F14x only). |
| 35 | P3.7/URXD1 | bidirectional | General-purpose I/O or USART1 receive data input in UART mode (MSP430F14x only). |
| 36 | P4.0/TB0 | bidirectional | General-purpose I/O, Timer_B capture CCI0A/CCI0B, or compare Out0. |
| 37 | P4.1/TB1 | bidirectional | General-purpose I/O, Timer_B capture CCI1A/CCI1B, or compare Out1. |
| 38 | P4.2/TB2 | bidirectional | General-purpose I/O, Timer_B capture CCI2A/CCI2B, or compare Out2. |
| 39 | P4.3/TB3 | bidirectional | General-purpose I/O, Timer_B capture CCI3A/CCI3B, or compare Out3 (MSP430F14x only). |
| 40 | P4.4/TB4 | bidirectional | General-purpose I/O, Timer_B capture CCI4A/CCI4B, or compare Out4 (MSP430F14x only). |
| 41 | P4.5/TB5 | bidirectional | General-purpose I/O, Timer_B capture CCI5A/CCI5B, or compare Out5 (MSP430F14x only). |
| 42 | P4.6/TB6 | bidirectional | General-purpose I/O, Timer_B capture CCI6A/CCI6B, or compare Out6 (MSP430F14x only). |
| 43 | P4.7/TBCLK | bidirectional | General-purpose I/O or Timer_B clock input TBCLK. |
| 44 | P5.0/STE1 | bidirectional | General-purpose I/O or USART1 slave transmit enable in SPI mode (MSP430F14x only). |
| 45 | P5.1/SIMO1 | bidirectional | General-purpose I/O or USART1 slave in/master out in SPI mode (MSP430F14x only). |
| 46 | P5.2/SOMI1 | bidirectional | General-purpose I/O or USART1 slave out/master in in SPI mode (MSP430F14x only). |
| 47 | P5.3/UCLK1 | bidirectional | General-purpose I/O, USART1 clock input in UART/SPI mode or output in SPI master mode (MSP430F14x only). |
| 48 | P5.4/MCLK | bidirectional | General-purpose I/O or main system clock MCLK output. |
| 49 | P5.5/SMCLK | bidirectional | General-purpose I/O or submain system clock SMCLK output. |
| 50 | P5.6/ACLK | bidirectional | General-purpose I/O or auxiliary clock ACLK output. |
| 51 | P5.7/TBOUTH | bidirectional | General-purpose I/O or Timer_B7 PWM output high-impedance switch for TB0-TB6. |
| 52 | XT2OUT | output | Crystal oscillator XT2 output terminal. |
| 53 | XT2IN | input | Crystal oscillator XT2 input for standard crystals only. |
| 54 | TDO/TDI | bidirectional | Test data output or programming data input for JTAG interface. |
| 55 | TDI/TCLK | input | Test data input or test clock input with JTAG fuse control connection. |
| 56 | TMS | input | Test mode select input for device programming and test. |
| 57 | TCK | input | Test clock input for device programming, test, and bootloader start. |
| 58 | RST/NMI | input | Reset input, nonmaskable interrupt input, or bootloader start trigger. |
| 59 | P6.0/A0 | bidirectional | General-purpose digital I/O pin or analog input A0 to 12-bit ADC. |
| 60 | P6.1/A1 | bidirectional | General-purpose digital I/O pin or analog input A1 to 12-bit ADC. |
| 61 | P6.2/A2 | bidirectional | General-purpose digital I/O pin or analog input A2 to 12-bit ADC. |
| 62 | AVSS | power_in | Analog supply voltage negative terminal, ground reference for ADC analog circuits. |
| 63 | DVSS | power_in | Digital supply voltage negative terminal, ground reference for digital circuits. |
| 64 | AVCC | power_in | Analog supply voltage positive terminal, 1.8V to 3.6V nominal, supplies ADC analog portion. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
MSP430F149IPM - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
msp430f149ipm-etched.step/msp430f149ipm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430f149ipm.step/msp430f149ipm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (88 pp, sha256
204ddbe54beb84d7, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).