component
MSP430F1481IPMR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430F1481IPMR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
MSP430F1481IPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage, positive terminal; supplies all digital parts. |
| 2 | P6.3 | bidirectional | General-purpose digital I/O pin. |
| 3 | P6.4 | bidirectional | General-purpose digital I/O pin. |
| 4 | P6.5 | bidirectional | General-purpose digital I/O pin. |
| 5 | P6.6 | bidirectional | General-purpose digital I/O pin. |
| 6 | P6.7 | bidirectional | General-purpose digital I/O pin. |
| 7 | Reserved | unconnected | Reserved pin; do not connect externally. |
| 8 | XIN | input | Input port for crystal oscillator XT1; standard or watch crystals can be connected. |
| 9 | XOUT | output | Output terminal of crystal oscillator XT1. |
| 10 | DVSS | power_in | Digital supply voltage, negative terminal; connect to DVSS. |
| 11 | DVSS | power_in | Digital supply voltage, negative terminal; connect to DVSS. |
| 12 | P1.0/TACLK | bidirectional | General-purpose digital I/O pin; Timer_A clock signal TACLK input. |
| 13 | P1.1/TA0 | bidirectional | General-purpose digital I/O pin; Timer_A CCI0A capture input or Out0 compare output; BSL transmit. |
| 14 | P1.2/TA1 | bidirectional | General-purpose digital I/O pin; Timer_A CCI1A capture input or Out1 compare output. |
| 15 | P1.3/TA2 | bidirectional | General-purpose digital I/O pin; Timer_A CCI2A capture input or Out2 compare output. |
| 16 | P1.4/SMCLK | bidirectional | General-purpose digital I/O pin; SMCLK signal output. |
| 17 | P1.5/TA0 | bidirectional | General-purpose digital I/O pin; Timer_A Out0 compare output. |
| 18 | P1.6/TA1 | bidirectional | General-purpose digital I/O pin; Timer_A Out1 compare output. |
| 19 | P1.7/TA2 | bidirectional | General-purpose digital I/O pin; Timer_A Out2 compare output. |
| 20 | P2.0/ACLK | bidirectional | General-purpose digital I/O pin; ACLK output. |
| 21 | P2.1/TAINCLK | bidirectional | General-purpose digital I/O pin; Timer_A clock signal at INCLK. |
| 22 | P2.2/CAOUT/TA0 | bidirectional | General-purpose digital I/O pin; Comparator_A output; Timer_A CCI0B capture input; BSL receive. |
| 23 | P2.3/CA0/TA1 | bidirectional | General-purpose digital I/O pin; Timer_A Out1 compare output; Comparator_A input. |
| 24 | P2.4/CA1/TA2 | bidirectional | General-purpose digital I/O pin; Timer_A Out2 compare output; Comparator_A input. |
| 25 | P2.5/ROSC | bidirectional | General-purpose digital I/O pin; input for external resistor defining the DCO nominal frequency. |
| 26 | P2.6 | bidirectional | General-purpose digital I/O pin. |
| 27 | P2.7/TA0 | bidirectional | General-purpose digital I/O pin; Timer_A Out0 compare output. |
| 28 | P3.0/STE0 | bidirectional | General-purpose digital I/O pin; slave transmit enable for USART0 in SPI mode. |
| 29 | P3.1/SIMO0 | bidirectional | General-purpose digital I/O pin; slave in/master out of USART0 in SPI mode. |
| 30 | P3.2/SOMI0 | bidirectional | General-purpose digital I/O pin; slave out/master in of USART0 in SPI mode. |
| 31 | P3.3/UCLK0 | bidirectional | General-purpose digital I/O pin; USART0 clock, external input in UART or SPI mode and output in SPI mode. |
| 32 | P3.4/UTXD0 | bidirectional | General-purpose digital I/O pin; transmit data out for USART0 in UART mode. |
| 33 | P3.5/URXD0 | bidirectional | General-purpose digital I/O pin; receive data in for USART0 in UART mode. |
| 34 | P3.6/UTXD1 | bidirectional | General-purpose digital I/O pin; transmit data out for USART1 in UART mode. |
| 35 | P3.7/URXD1 | bidirectional | General-purpose digital I/O pin; receive data in for USART1 in UART mode. |
| 36 | P4.0/TB0 | bidirectional | General-purpose digital I/O pin; Timer_B capture input CCI0A or CCI0B, or Out0 compare output. |
| 37 | P4.1/TB1 | bidirectional | General-purpose digital I/O pin; Timer_B capture input CCI1A or CCI1B, or Out1 compare output. |
| 38 | P4.2/TB2 | bidirectional | General-purpose digital I/O pin; Timer_B capture input CCI2A or CCI2B, or Out2 compare output. |
| 39 | P4.3/TB3 | bidirectional | General-purpose digital I/O pin; Timer_B capture input CCI3A or CCI3B, or Out3 compare output. |
| 40 | P4.4/TB4 | bidirectional | General-purpose digital I/O pin; Timer_B capture input CCI4A or CCI4B, or Out4 compare output. |
| 41 | P4.5/TB5 | bidirectional | General-purpose digital I/O pin; Timer_B capture input CCI5A or CCI5B, or Out5 compare output. |
| 42 | P4.6/TB6 | bidirectional | General-purpose digital I/O pin; Timer_B capture input CCI6A or CCI6B, or Out6 compare output. |
| 43 | P4.7/TBCLK | bidirectional | General-purpose digital I/O pin; Timer_B clock signal TBCLK input. |
| 44 | P5.0/STE1 | bidirectional | General-purpose digital I/O pin; slave transmit enable for USART1 in SPI mode. |
| 45 | P5.1/SIMO1 | bidirectional | General-purpose digital I/O pin; slave in/master out of USART1 in SPI mode. |
| 46 | P5.2/SOMI1 | bidirectional | General-purpose digital I/O pin; slave out/master in of USART1 in SPI mode. |
| 47 | P5.3/UCLK1 | bidirectional | General-purpose digital I/O pin; USART1 clock, external input in UART or SPI mode and output in SPI mode. |
| 48 | P5.4/MCLK | bidirectional | General-purpose digital I/O pin; main system clock MCLK output. |
| 49 | P5.5/SMCLK | bidirectional | General-purpose digital I/O pin; submain system clock SMCLK output. |
| 50 | P5.6/ACLK | bidirectional | General-purpose digital I/O pin; auxiliary clock ACLK output. |
| 51 | P5.7/TBOUTH | bidirectional | General-purpose digital I/O pin; switches all PWM digital output ports to high impedance for Timer_B7 (TB0 to TB6). |
| 52 | XT2OUT | output | Output terminal of crystal oscillator XT2. |
| 53 | XT2IN | input | Input port for crystal oscillator XT2; only standard crystals can be connected. |
| 54 | TDO/TDI | bidirectional | Test data output or programming data input. |
| 55 | TDI/TCLK | input | Test data input or test clock input; the device protection fuse is connected to TDI/TCLK. |
| 56 | TMS | input | Test mode select, used as an input port for device programming and test. |
| 57 | TCK | input | Test clock, the clock input port for device programming test and bootloader start. |
| 58 | RST/NMI | input | Reset input, nonmaskable interrupt input port, and bootloader start. |
| 59 | P6.0 | bidirectional | General-purpose digital I/O pin. |
| 60 | P6.1 | bidirectional | General-purpose digital I/O pin. |
| 61 | P6.2 | bidirectional | General-purpose digital I/O pin. |
| 62 | AVSS | power_in | Analog supply voltage negative terminal. |
| 63 | DVSS | power_in | Digital supply voltage, negative terminal; supplies all digital parts. |
| 64 | AVCC | power_in | Analog supply voltage positive terminal. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
MSP430F1481IPMR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
msp430f1481ipmr-etched.step/msp430f1481ipmr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430f1481ipmr.step/msp430f1481ipmr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (88 pp, sha256
204ddbe54beb84d7, retrieved 2026-10-12, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).