component
MSP430F123IRHBR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430F123IRHBR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-32-EP(5x5)
MSP430F123IRHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground reference for the device. |
| 2 | XOUT | output | Output terminal of the crystal oscillator. |
| 3 | XIN | input | Input terminal of the crystal oscillator. |
| 4 | NC | unconnected | Not internally connected. |
| 5 | RST/NMI | input | Reset or nonmaskable interrupt input. |
| 6 | P2.0/ACLK | bidirectional | General-purpose digital I/O pin, also ACLK output. |
| 7 | P2.1/INCLK | bidirectional | General-purpose digital I/O pin, also Timer_A clock signal at INCLK. |
| 8 | P2.2/CAOUT/TA0 | bidirectional | General-purpose digital I/O pin, also Timer_A CCI0B capture input, comparator_A output, and BSL receive. |
| 9 | P3.0/STE0 | bidirectional | General-purpose digital I/O pin, also slave transmit enable for USART0 in SPI mode. |
| 10 | P3.1/SIMO0 | bidirectional | General-purpose digital I/O pin, also slave in/master out of USART0 in SPI mode. |
| 11 | P3.2/SOMI0 | bidirectional | General-purpose digital I/O pin, also slave out/master in of USART0 in SPI mode. |
| 12 | P3.3/UCLK0 | bidirectional | General-purpose digital I/O pin, also USART0 external clock input in UART or SPI mode and clock output in SPI mode. |
| 13 | P3.4/UTXD0 | bidirectional | General-purpose digital I/O pin, also USART0 transmit data output in UART mode. |
| 14 | P3.5/URXD0 | bidirectional | General-purpose digital I/O pin, also USART0 receive data input in UART mode. |
| 15 | P3.6 | bidirectional | General-purpose digital I/O pin. |
| 16 | P3.7 | bidirectional | General-purpose digital I/O pin. |
| 17 | NC | unconnected | Not internally connected. |
| 18 | P2.3/CA0/TA1 | bidirectional | General-purpose digital I/O pin, also Timer_A CCI1 compare Out1 output and comparator_A input. |
| 19 | P2.4/CA1/TA2 | bidirectional | General-purpose digital I/O pin, also Timer_A compare Out2 output and comparator_A input. |
| 20 | NC | unconnected | Not internally connected. |
| 21 | P1.0/TACLK | bidirectional | General-purpose digital I/O pin, also Timer_A clock signal TACLK input. |
| 22 | P1.1/TA0 | bidirectional | General-purpose digital I/O pin, also Timer_A CCI0A capture input, Out0 compare output, and BSL transmit. |
| 23 | P1.2/TA1 | bidirectional | General-purpose digital I/O pin, also Timer_A CCI1A capture input and Out1 compare output. |
| 24 | P1.3/TA2 | bidirectional | General-purpose digital I/O pin, also Timer_A CCI2A capture input and Out2 compare output. |
| 25 | P1.4/SMCLK/TCK | bidirectional | General-purpose digital I/O pin, also SMCLK signal output and test clock input for device programming and test. |
| 26 | P1.5/TA0/TMS | bidirectional | General-purpose digital I/O pin, also Timer_A Out0 compare output and test mode select input for device programming and test. |
| 27 | P1.6/TA1/TDI/TCLK | bidirectional | General-purpose digital I/O pin, also Timer_A Out1 compare output and test data input or test clock input. |
| 28 | P1.7/TA2/TDO/TDI | bidirectional | General-purpose digital I/O pin, also Timer_A Out2 compare output and test data output or data input during programming; TDO or TDI is selected via JTAG instruction. |
| 29 | TEST | input | Selects test mode for JTAG pins on Port 1. |
| 30 | VCC | power_in | Supply voltage; the device operating range is 1.8 V to 3.6 V per the device features. |
| 31 | NC | unconnected | Not internally connected. |
| 32 | P2.5/ROSC | bidirectional | General-purpose digital I/O pin, also input for an external resistor that defines the DCO nominal frequency. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
MSP430F123IRHBR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
msp430f123irhbr-etched.step/msp430f123irhbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430f123irhbr.step/msp430f123irhbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (45 pp, sha256
739540db5ae64cbb, retrieved 2026-10-12, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).