Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

MSP430F1121AIPWR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-20

MSP430F1121AIPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TEST input Input for selecting test mode for JTAG pins on Port1; device protection fuse is connected to this pin.
2 VCC power_in Supply voltage input; 1.8 V to 3.6 V recommended operating range.
3 P2.5/ROSC bidirectional General-purpose digital I/O pin or input for external resistor that defines the DCO nominal frequency.
4 VSS power_in Ground reference at 0 V.
5 XOUT output Output terminal of crystal oscillator.
6 XIN input Input terminal of crystal oscillator; accepts 32,768 Hz watch crystal or ceramic resonator up to 8 MHz.
7 RST/NMI input Reset or nonmaskable interrupt input; low pulse at RST/NMI pin triggers internal reset.
8 P2.0/ACLK bidirectional General-purpose digital I/O pin or ACLK clock output.
9 P2.1/INCLK bidirectional General-purpose digital I/O pin or Timer_A clock input signal.
10 P2.2/CAOUT/TA0 bidirectional General-purpose digital I/O pin, Timer_A capture input (CCI0B), or comparator_A output; used for BSL receive.
11 P2.3/CA0/TA1 bidirectional General-purpose digital I/O pin, Timer_A compare output (Out1), or comparator_A input.
12 P2.4/CA1/TA2 bidirectional General-purpose digital I/O pin, Timer_A compare output (Out2), or comparator_A input.
13 P1.0/TACLK bidirectional General-purpose digital I/O pin or Timer_A clock input (TACLK); external interrupt capable.
14 P1.1/TA0 bidirectional General-purpose digital I/O pin or Timer_A capture/compare register; used for BSL transmit; external interrupt capable.
15 P1.2/TA1 bidirectional General-purpose digital I/O pin or Timer_A capture/compare register; external interrupt capable.
16 P1.3/TA2 bidirectional General-purpose digital I/O pin or Timer_A capture/compare register; external interrupt capable.
17 P1.4/SMCLK/TCK bidirectional General-purpose digital I/O pin or SMCLK output; test clock input for JTAG device programming; external interrupt capable.
18 P1.5/TA0/TMS bidirectional General-purpose digital I/O pin or Timer_A compare output; test mode select input for JTAG; external interrupt capable.
19 P1.6/TA1/TDI/TCLK bidirectional General-purpose digital I/O pin or Timer_A compare output; test data input or test clock for JTAG; external interrupt capable.
20 P1.7/TA2/TDO/TDI bidirectional General-purpose digital I/O pin or Timer_A compare output; test data output or input during JTAG programming; external interrupt capable.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Embedded Processors & Controllers
Pins 20

CAD (KiCad official)

  • Symbol: MSP430F1121AIPWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: msp430f1121aipwr-etched.step / msp430f1121aipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f1121aipwr.step / msp430f1121aipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (53 pp, sha256 244782f6277a7608, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF