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MSC1202Y3RHHR

Texas Instruments · ADCs/DACs - Special Purpose · VQFN-36(6x6)

MSC1202Y3RHHR from Texas Instruments, in a VQFN-36(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 XIN input Crystal oscillator input supporting parallel resonant AT-cut fundamental crystals and ceramic resonators; it can also be an external clock input and must not be left floating.
2 XOUT output Crystal oscillator output that serves as the output of the crystal amplifier for parallel resonant AT-cut crystals and ceramic resonators.
3 DGND power_in Digital ground.
4 RST input Holding the reset input high for two tOSC periods resets the device.
5 NC unconnected No connection; leave unconnected.
6 AVDD power_in Analog power supply; absolute maximum AVDD to AGND is −0.3 V to +6 V and the device supply range is 2.7 V to 5.25 V.
7 AGND power_in Analog ground.
8 AGND power_in Analog ground.
9 AINCOM input Analog input that can serve as analog common for single-ended inputs or as an analog input for differential inputs.
10 IDAC output Output of the on-chip 8-bit current DAC.
11 REFOUT/REFIN+ bidirectional Internal voltage reference output or voltage reference positive input; requires CREF = 0.1 µF.
12 REFIN− input Voltage reference negative input; tie to AGND to use the internal voltage reference.
13 AIN5 input Analog input channel 5, usable as differential or single-ended input.
14 AIN4 input Analog input channel 4, usable as differential or single-ended input.
15 AIN3 input Analog input channel 3, usable as differential or single-ended input.
16 AIN2 input Analog input channel 2, usable as differential or single-ended input.
17 AIN1 input Analog input channel 1, usable as differential or single-ended input.
18 AIN0 input Analog input channel 0, usable as differential or single-ended input.
19 P1.0 bidirectional Port 1 bidirectional I/O (direction set by P1DDRL/P1DDRH); alternate function PROG is the serial programming mode select, which must be DGND on reset.
20 P1.1 bidirectional Port 1 bidirectional I/O (direction set by P1DDRL/P1DDRH) with no alternate function listed.
21 P1.2 bidirectional Port 1 bidirectional I/O (direction set by P1DDRL/P1DDRH); alternate function DOUT is the serial data output.
22 P1.3 bidirectional Port 1 bidirectional I/O (direction set by P1DDRL/P1DDRH); alternate function DIN is the serial data input.
23 P1.4 bidirectional Port 1 bidirectional I/O (direction set by P1DDRL/P1DDRH); alternate functions are external interrupt 2 and Slave Select (INT2/SS).
24 P1.5 bidirectional Port 1 bidirectional I/O (direction set by P1DDRL/P1DDRH); alternate function is external interrupt 3 (INT3).
25 P1.6 bidirectional Port 1 bidirectional I/O (direction set by P1DDRL/P1DDRH); alternate function is external interrupt 4 (INT4).
26 DGND power_in Digital ground.
27 DVDD power_in Digital power supply; absolute maximum DVDD to DGND is −0.3 V to +6 V.
28 P1.7 bidirectional Port 1 bidirectional I/O (direction set by P1DDRL/P1DDRH); alternate function is external interrupt 5 (INT5).
29 P3.0 bidirectional Port 3 bidirectional I/O (direction set by P3DDRL/P3DDRH); alternate function RxD0 is the serial port 0 input.
30 P3.1 bidirectional Port 3 bidirectional I/O (direction set by P3DDRL/P3DDRH); alternate function TxD0 is the serial port 0 output.
31 P3.2 bidirectional Port 3 bidirectional I/O (direction set by P3DDRL/P3DDRH); alternate function INT0 is external interrupt 0.
32 P3.3 bidirectional Port 3 bidirectional I/O (direction set by P3DDRL/P3DDRH); alternate function INT1 is external interrupt 1.
33 P3.4 bidirectional Port 3 bidirectional I/O (direction set by P3DDRL/P3DDRH); alternate function T0 is the Timer 0 external input.
34 P3.5 bidirectional Port 3 bidirectional I/O (direction set by P3DDRL/P3DDRH); alternate function T1 is the Timer 1 external input.
35 P3.6 bidirectional Port 3 bidirectional I/O (direction set by P3DDRL/P3DDRH); alternate function SCK/SCL/CLKS provides SCK, SCL and various clocks (see PASEL, SFR F2h).
36 P3.7 bidirectional Port 3 bidirectional I/O (direction set by P3DDRL/P3DDRH) with no alternate function listed.
37 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-36(6x6)
Category Data Acquisition
Pins 37

CAD (KiCad official)

  • Symbol: MSC1202Y3RHHR
  • Footprint: Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
  • 3D model: VQFN-36(6x6) (KiCad packages3D, STEP)
  • 3D model files: msc1202y3rhhr-etched.step / msc1202y3rhhr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msc1202y3rhhr.step / msc1202y3rhhr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (92 pp, sha256 6ef31573775e75b8, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF