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MS90C032

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Hangzhou Ruimeng Tech LVDS ICs, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs ms90c032: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers ms90c032: viewers · Ray 27d ago
ms90c032-etched.fit.json ms90c032: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ms90c032-etched.glb ms90c032: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ms90c032-etched.step ms90c032: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ms90c032.glb Publish 0.1.0 · Ray 27d ago
ms90c032.kicad_mod Publish 0.1.0 · Ray 27d ago
ms90c032.kicad_sym Publish 0.1.0 · Ray 27d ago
ms90c032.lbr Publish 0.1.0 · Ray 27d ago
ms90c032.step Publish 0.1.0 · Ray 27d ago
package.json Publish 0.1.0 · Ray 27d ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md ms90c032: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago

MS90C032

Hangzhou Ruimeng Tech · LVDS ICs · SOP-16

MS90C032 from Hangzhou Ruimeng Tech, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RIN1- input Channel 1 LVDS inverting differential input. Part of the 350 mV differential LVDS receiver pair for channel 1; input voltage range -0.3 V to Vcc+0.3 V.
2 RIN1+ input Channel 1 LVDS non-inverting differential input. Part of the 350 mV differential LVDS receiver pair for channel 1; input voltage range -0.3 V to Vcc+0.3 V.
3 ROUT1 output Channel 1 CMOS/TTL-compatible single-ended output. VOH ≥ 3.8 V (IOH = -0.4 mA), VOL ≤ 0.3 V (IOL = 2 mA); goes to high-Z when the receiver is disabled by EN/EN*.
4 EN input Active-high enable input (non-inverting). All four ROUT outputs are enabled when EN is high AND EN* is low; VIH ≥ 2.0 V, VIL ≤ 0.8 V.
5 ROUT2 output Channel 2 CMOS/TTL-compatible single-ended output. VOH ≥ 3.8 V (IOH = -0.4 mA), VOL ≤ 0.3 V (IOL = 2 mA); goes to high-Z when the receiver is disabled by EN/EN*.
6 RIN2+ input Channel 2 LVDS non-inverting differential input. Part of the 350 mV differential LVDS receiver pair for channel 2; input voltage range -0.3 V to Vcc+0.3 V.
7 RIN2- input Channel 2 LVDS inverting differential input. Part of the 350 mV differential LVDS receiver pair for channel 2; input voltage range -0.3 V to Vcc+0.3 V.
8 GND power_in Device ground reference (0 V). Common return for VCC and all input/output signals.
9 RIN3- input Channel 3 LVDS inverting differential input. Part of the 350 mV differential LVDS receiver pair for channel 3; input voltage range -0.3 V to Vcc+0.3 V.
10 RIN3+ input Channel 3 LVDS non-inverting differential input. Part of the 350 mV differential LVDS receiver pair for channel 3; input voltage range -0.3 V to Vcc+0.3 V.
11 ROUT3 output Channel 3 CMOS/TTL-compatible single-ended output. VOH ≥ 3.8 V (IOH = -0.4 mA), VOL ≤ 0.3 V (IOL = 2 mA); goes to high-Z when the receiver is disabled by EN/EN*.
12 EN* input Active-low enable input (inverting enable, complement of EN). Outputs go to Hi-Z only when EN = L AND EN* = H; otherwise the receivers are enabled. VIH ≥ 2.0 V, VIL ≤ 0.8 V.
13 ROUT4 output Channel 4 CMOS/TTL-compatible single-ended output. VOH ≥ 3.8 V (IOH = -0.4 mA), VOL ≤ 0.3 V (IOL = 2 mA); goes to high-Z when the receiver is disabled by EN/EN*.
14 RIN4+ input Channel 4 LVDS non-inverting differential input. Part of the 350 mV differential LVDS receiver pair for channel 4; input voltage range -0.3 V to Vcc+0.3 V.
15 RIN4- input Channel 4 LVDS inverting differential input. Part of the 350 mV differential LVDS receiver pair for channel 4; input voltage range -0.3 V to Vcc+0.3 V.
16 VCC power_in Positive supply. Operating range 2.5-5.5 V (typ 5 V); absolute max 6 V. Decouple to GND close to the pin.

Key specifications

Parameter Value
Manufacturer Hangzhou Ruimeng Tech
Package SOP-16
Category Interface
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • MS90C032
  • MS90C032B
  • MS90C032T
  • MS90C032TB

CAD (KiCad official)

  • Symbol: MS90C032
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: ms90c032-etched.step / ms90c032-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ms90c032.step / ms90c032.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Hangzhou Ruimeng Tech datasheet (15 pp, sha256 9c062295b10bb638, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF