component
MS78L12
Public Made by Adomby adom
MSKSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 20d ago |
| viewers | 20d ago |
| ms78l12-etched.glb | 20d ago |
| ms78l12-etched.step | 20d ago |
| ms78l12-hero.glb | 20d ago |
| ms78l12-hero.overlay.json | 20d ago |
| ms78l12.glb | 20d ago |
| ms78l12.kicad_mod | 20d ago |
| ms78l12.kicad_sym | 20d ago |
| ms78l12.lbr | 20d ago |
| ms78l12.step | 20d ago |
| package.json | 20d ago |
| page.json | 20d ago |
| README.md | 20d ago |
MS78L12
MSKSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
MS78L12 from MSKSEMI, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VO | power_out | Regulated 12V output (11.5V min to 12.5V max at Tj=25°C), decoupled with a 0.1µF output capacitor CO, with up to 100mA maximum output current. |
| 2 | GND | power_in | Ground reference for the regulator, common to input and output capacitors. |
| 3 | VI | power_in | Unregulated input voltage, rated up to 35V absolute maximum for the 10V-15V output versions, decoupled with a 0.33µF input capacitor CI. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SOT-89 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (Tj=25℃) | VO | 11.5 | 12 | 12.5 | V | Tj=25℃ | 6 |
| Output voltage (line and load range) | VO | 11.4 | 12.6 | V | VI=14.5V-27V, IO=1mA-40mA | 6 | |
| Output voltage (full load) | VO | 11.4 | 12.6 | V | VI=19V, IO=1mA-70mA | 6 | |
| Load regulation | Regload | 20 | 100 | mV | Tj=25℃, IO=1mA-100mA | 6 | |
| Load regulation | Regload | 10 | 50 | mV | Tj=25℃, IO=1mA-40mA | 6 | |
| Line regulation | Regline | 120 | 250 | mV | 14.5V≤Vi≤27V, Tj=25℃ | 6 | |
| Line regulation | Regline | 100 | 200 | mV | 16V≤Vi≤27V, Tj=25℃ | 6 | |
| Input bias current (Tj=25℃) | IIB | 4.2 | 6.5 | mA | Tj=25℃ | 6 | |
| Input bias current (Tj=125℃) | IIB | 6 | mA | Tj=125℃ | 6 | ||
| Input bias current change (line) | ΔIIB | 1.5 | mA | 16V≤Vi≤27V | 6 | ||
| Input bias current change (load) | ΔIIB | 0.1 | mA | 1mA≤IO≤40mA | 6 | ||
| Ripple rejection | RR | 37 | 42 | dB | IO=40mA, 15V≤Vi≤25V, f=120Hz, Tj=25℃ | 6 | |
| Input voltage (10V-15V output group, applies to MS78L12) | VI | 35 | V | 2 | |||
| Maximum output current | ICM | 100 | mA | 2 | |||
| Power dissipation | PD | 500 | mW | 2 | |||
| Operating junction temperature | TOPR | -40 | 125 | ℃ | 2 | ||
| Storage temperature range | Tj,Tstg | -40 | 150 | ℃ | 2 |
CAD (KiCad official)
- Symbol:
MS78L12 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files:
ms78l12-etched.step/ms78l12-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ms78l12.step/ms78l12.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MSKSEMI datasheet (9 pp, sha256
48f5c06e3007f8e7, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).