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MS78L08
Public Made by Adomby adom
MSKSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MS78L08
MSKSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
MS78L08 from MSKSEMI, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VO | power_out | Regulated 8 V output (7.7 V to 8.3 V at Tj=25°C), rated for a maximum output current of 100 mA and decoupled with a 0.1 µF capacitor CO to GND. |
| 2 | GND | power_in | Ground reference common to input and output, connected to the return of the 0.33 µF input and 0.1 µF output capacitors. |
| 3 | VI | power_in | Unregulated input voltage, specified for 10.5 V to 23 V line regulation, with a 0.33 µF input capacitor CI to GND and an absolute maximum of 30 V for the 3.3 V-9 V output versions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SOT-89 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (Tj=25℃) | VO | 7.7 | 8 | 8.3 | V | Tj=25℃ | 4 |
| Output voltage (line/load window) | VO | 7.6 | 8.4 | V | 10.5V≤Vi≤23V, IO=1mA-40mA | 4 | |
| Output voltage (full load) | VO | 7.6 | 8.4 | V | VI=14V, IO=1mA-70mA | 4 | |
| Load regulation | Regload | 15 | 80 | mV | Tj=25℃, IO=1mA-100mA | 4 | |
| Load regulation | Regload | 8 | 40 | mV | Tj=25℃, IO=1mA-40mA | 4 | |
| Line regulation | Regline | 20 | 175 | mV | 10.5V≤Vi≤23V, Tj=25℃ | 4 | |
| Line regulation | Regline | 12 | 125 | mV | 11V≤Vi≤23V, Tj=25℃ | 4 | |
| Input bias current | IIB | 3 | 6 | mA | Tj=25℃ | 4 | |
| Input bias current | IIB | 5.5 | mA | Tj=125℃ | 4 | ||
| Input bias current change | △IIB | 1.5 | mA | 11V≤Vi≤23V | 4 | ||
| Input bias current change | △IIB | 0.1 | mA | 1mA≤IO≤40mA | 4 | ||
| Ripple rejection | RR | 37 | 57 | dB | IO=40mA, 12V≤Vi≤23V, f=120Hz, Tj=25℃ | 4 | |
| Output noise voltage | VN | 60 | μV | TA=25℃, 10Hz≤f≤100KHz | 4 | ||
| Dropout voltage | VI-VO | 1.7 | V | Tj=25℃ | 4 | ||
| Output current (maximum) | ICM | 100 | mA | 2 | |||
| Power dissipation | PD | 500 | mW | 2 | |||
| Operating junction temperature | TOPR | -40 | 125 | ℃ | 2 | ||
| Storage temperature range | Tj,Tstg | -40 | 150 | ℃ | 2 |
CAD (KiCad official)
- Symbol:
MS78L08 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files:
ms78l08-etched.step/ms78l08-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ms78l08.step/ms78l08.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MSKSEMI datasheet (9 pp, sha256
2cc74d0a15df86ee, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MS78L08
**MSKSEMI** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
MS78L08 from MSKSEMI, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VO | power_out | Regulated 8 V output (7.7 V to 8.3 V at Tj=25°C), rated for a maximum output current of 100 mA and decoupled with a 0.1 µF capacitor CO to GND. |
| 2 | GND | power_in | Ground reference common to input and output, connected to the return of the 0.33 µF input and 0.1 µF output capacitors. |
| 3 | VI | power_in | Unregulated input voltage, specified for 10.5 V to 23 V line regulation, with a 0.33 µF input capacitor CI to GND and an absolute maximum of 30 V for the 3.3 V-9 V output versions. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SOT-89 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (Tj=25℃) | VO | 7.7 | 8 | 8.3 | V | Tj=25℃ | 4 |
| Output voltage (line/load window) | VO | 7.6 | | 8.4 | V | 10.5V≤Vi≤23V, IO=1mA-40mA | 4 |
| Output voltage (full load) | VO | 7.6 | | 8.4 | V | VI=14V, IO=1mA-70mA | 4 |
| Load regulation | Regload | | 15 | 80 | mV | Tj=25℃, IO=1mA-100mA | 4 |
| Load regulation | Regload | | 8 | 40 | mV | Tj=25℃, IO=1mA-40mA | 4 |
| Line regulation | Regline | | 20 | 175 | mV | 10.5V≤Vi≤23V, Tj=25℃ | 4 |
| Line regulation | Regline | | 12 | 125 | mV | 11V≤Vi≤23V, Tj=25℃ | 4 |
| Input bias current | IIB | | 3 | 6 | mA | Tj=25℃ | 4 |
| Input bias current | IIB | | | 5.5 | mA | Tj=125℃ | 4 |
| Input bias current change | △IIB | | | 1.5 | mA | 11V≤Vi≤23V | 4 |
| Input bias current change | △IIB | | | 0.1 | mA | 1mA≤IO≤40mA | 4 |
| Ripple rejection | RR | 37 | 57 | | dB | IO=40mA, 12V≤Vi≤23V, f=120Hz, Tj=25℃ | 4 |
| Output noise voltage | VN | | 60 | | μV | TA=25℃, 10Hz≤f≤100KHz | 4 |
| Dropout voltage | VI-VO | | 1.7 | | V | Tj=25℃ | 4 |
| Output current (maximum) | ICM | | | 100 | mA | | 2 |
| Power dissipation | PD | | | 500 | mW | | 2 |
| Operating junction temperature | TOPR | -40 | | 125 | ℃ | | 2 |
| Storage temperature range | Tj,Tstg | -40 | | 150 | ℃ | | 2 |
## CAD (KiCad official)
- Symbol: `MS78L08`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files: `ms78l08-etched.step` / `ms78l08-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ms78l08.step` / `ms78l08.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [MSKSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590239362903539712) (9 pp, sha256 `2cc74d0a15df86ee`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ms78l08-datasheet.pdf)