MS5614T

{
  "slug": "ms5614t",
  "version": "0.1.0",
  "type": "component",
  "description": "Hangzhou Ruimeng Tech Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "data acquisition",
    "ms5614t",
    "factory-2.0.0",
    "extractor-text"
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  "dependencies": {},
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    "path": "docs/hero.png"
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  "component": {
    "mpn": "MS5614T",
    "manufacturer": "Hangzhou Ruimeng Tech",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908139328913408",
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      "lbr": "ms5614t.lbr"
    },
    "distributor_links": {
      "lcsc": "C1509046"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T02:55:22Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital power supply; the datasheet limits the AVDD-to-DVDD difference to -2.8 V to +2.8 V (absolute maximum) and gives a digital supply of 2.7 V to 5.5 V in the recommended conditions."
      },
      {
        "number": "2",
        "name": "PD",
        "type": "input",
        "description": "Power-down pin; when driven low the chip is shut down."
      },
      {
        "number": "3",
        "name": "LDAC",
        "type": "input",
        "description": "When LDAC is high the DAC outputs are not updated; when LDAC is low the DAC outputs are updated."
      },
      {
        "number": "4",
        "name": "DIN",
        "type": "input",
        "description": "Serial data input; 16-bit words (4 control bits plus 12 data bits) are shifted in MSB first on the falling edge of SCLK."
      },
      {
        "number": "5",
        "name": "SCLK",
        "type": "input",
        "description": "Serial digital clock input, rated up to 20 MHz, with minimum high and low widths of 25 ns."
      },
      {
        "number": "6",
        "name": "CS",
        "type": "input",
        "description": "Chip select, active low; the serial interface is only active while CS is low, allowing several devices on one serial bus."
      },
      {
        "number": "7",
        "name": "FS",
        "type": "input",
        "description": "Frame synchronization input; serial data is clocked in on its falling edge and the internal DAC updates after 16 bits are transferred or when FS goes high."
      },
      {
        "number": "8",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "9",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground; the datasheet recommends a 0.1 uF ceramic bypass between VDD and AGND placed as close to the chip as possible."
      },
      {
        "number": "10",
        "name": "REFINCD",
        "type": "input",
        "description": "Reference voltage input for channels C and D; the input range is 0 V to AVDD-1.5 V, and exceeding AVDD/2 causes output saturation at large codes."
      },
      {
        "number": "11",
        "name": "OUTD",
        "type": "output",
        "description": "Analog output of channel D, swinging from 0 V to AVDD-0.4 V with a 10 kΩ load."
      },
      {
        "number": "12",
        "name": "OUTC",
        "type": "output",
        "description": "Analog output of channel C, swinging from 0 V to AVDD-0.4 V with a 10 kΩ load."
      },
      {
        "number": "13",
        "name": "OUTB",
        "type": "output",
        "description": "Analog output of channel B, swinging from 0 V to AVDD-0.4 V with a 10 kΩ load."
      },
      {
        "number": "14",
        "name": "OUTA",
        "type": "output",
        "description": "Analog output of channel A, swinging from 0 V to AVDD-0.4 V with a 10 kΩ load."
      },
      {
        "number": "15",
        "name": "REFINAB",
        "type": "input",
        "description": "Reference voltage input for channels A and B; the input range is 0 V to AVDD-1.5 V, and exceeding AVDD/2 causes output saturation at large codes."
      },
      {
        "number": "16",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog power supply; the datasheet gives 4.5 V to 5.5 V for 5 V operation and 2.7 V to 3.3 V for 3 V operation."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet's pinout diagram (SOP16/TSSOP16) is an image and is not present in the extracted text.; The datasheet's TSSOP16 package outline (page 13) gives pin pitch 0.65 mm, but the table does not st; Pin descriptions for DVDD, AVDD, and the reference inputs combine the table text with the recommende"
        ],
        "pages_sent": 15,
        "cost_usd": 0.0466,
        "at": "2026-10-19T02:52:43"
      },
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        "pages": 15,
        "sha256": "2e15d79c1ea33c81",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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}