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MS5542

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Hangzhou Ruimeng Tech Digital To Analog Converters (DAC), SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MS5542

Hangzhou Ruimeng Tech · Digital To Analog Converters (DAC) · SOP-14

MS5542 from Hangzhou Ruimeng Tech, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RFB output Resistive feedback pin that connects to the external op-amp output in bipolar mode (typical feedback resistor 28 kΩ per the bipolar circuit).
2 VOUT output DAC analog output voltage; unbuffered and able to drive a 60 kΩ load, with unipolar output range 0 V to VREF−1LSB.
3 AGNDF power_in Analog reference ground, part of the Kelvin-connected analog ground pair with AGNDS.
4 AGNDS power_in Analog reference ground, part of the Kelvin-connected analog ground pair with AGNDF.
5 REFS input DAC input reference voltage (load side); connect an external 2.5 V reference, with a valid range of 2 V to VDD.
6 REFF input DAC input reference voltage (sense side); connect an external 2.5 V reference, with a valid range of 2 V to VDD.
7 CS input Chip-select logic input that enables frame transfer; data is loaded only while CS is low, and a low-to-high transition transfers the serial register to the DAC register when LDAC is low.
8 SCLK input Serial clock input; data is shifted into the serial input register on the rising edge, with a maximum clock rate of 20 MHz.
9 NC unconnected Not connected.
10 DIN input Serial data input for 16-bit words, clocked in on the SCLK rising edge with MSB first.
11 LDAC input Load DAC control; when driven low, the DAC register is updated synchronously with the serial input register contents.
12 DGND power_in Digital ground reference, specified at 0 V relative to AGND.
13 INV output Connects to the DAC internal scaling resistor; in bipolar mode it connects to the external op-amp inverting input.
14 VDD power_in Power supply, specified from 2.7 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Hangzhou Ruimeng Tech
Package SOP-14
Category Data Acquisition
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (absolute maximum) VDD -0.3 6 V *1 absolute maximum rating 5
Input current (absolute maximum) Iin -10 10 mA 5
Operating ambient temperature Topr -40 85 ℃ *2 operating ambient temperature 5
Storage temperature Tstg -65 150 ℃ *2 5
Supply voltage range (recommended) VDD 2.7 5 5.5 V 5
Reference voltage range (recommended) VREF 2 2.5 V max printed as VDD 5
Integral nonlinearity (INL) 6.5 10.5 LSB VREF=2.048V, VDD=5V, TA=25℃ 6
Differential nonlinearity (DNL) 4 5 LSB 6
Gain error 2 5 LSB TA=25℃ 6
Unipolar zero-code error 2 2.5 LSB TA=25℃ 6
Bipolar zero-scale offset error (MS5542) 2 5 LSB TA=25℃ 6
Bipolar zero-code offset error (MS5542) 2 5 LSB TA=25℃ 6
Bipolar gain error (MS5542) 2 5 LSB TA=25℃ 6
Output voltage range, unipolar mode 0 V unipolar mode; max printed as VREF-1LSB 6
Reference input range 2 V max printed as VDD 7
Supply voltage 2.7 5.5 V 7
Supply current 165 227 uA digital input at 0 7
Power dissipation 0.825 1.248 mW digital input at 0 7
Logic input low voltage 0.8 V 7
Logic input high voltage 2.4 V 7
SCLK frequency fSCLK 20 MHz 8
SCLK period time t1 50 ns 8
SCLK high time t2 25 ns 8
SCLK low time t3 25 ns 8
CS low to SCLK high setup time t4 30 ns 8
CS high to SCLK high setup time t5 45 ns 8
SCLK high to CS low hold time t6 45 ns 8
SCLK high to CS high hold time t7 30 ns 8
Data start time t8 20 ns 8
Data hold time t9 10 ns 8
LDAC pulse width t10 60 ns 8
CS high to LDAC low t11 60 ns 8
CS high valid time t12 60 ns 8
Resolution 14 bits 6
Gain error temperature coefficient 0.1 ppm/℃ 6
Unipolar zero-code error temperature coefficient 0.05 ppm/℃ 6
Bipolar zero-scale temperature coefficient (MS5542) 0.2 ppm/℃ 6
Bipolar gain temperature coefficient (MS5542) 0.1 ppm/℃ 6
Output voltage settling time 1.2 us CL=10pF 6
Slew rate 17 V/us CL=10pF, 0%-63% 6
Digital-to-analog glitch impulse 1.1 nV-sec 1LSB 6
Digital feedthrough 0.2 nV-sec VREF=2.048V 6
Output noise density 11.8 nV/√Hz DAC code=08400, f=1kHz 6
Output noise voltage 0.134 uVp-p f=0.1Hz to 10Hz 6
Power supply rejection ratio 1 LSB VDD 10% 6
DAC reference input impedance, unipolar mode 90 k unipolar mode 7
DAC reference input impedance, bipolar mode (MS5542) 72 k bipolar mode 7
Logic input current 1 uA 7
Logic input capacitance 10 pF 7
Logic input hysteresis voltage 0.15 V 7

CAD (KiCad official)

  • Symbol: MS5542
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: ms5542-etched.step / ms5542-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ms5542.step / ms5542.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Hangzhou Ruimeng Tech datasheet (20 pp, sha256 2fda6c470952131c, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF