component
MS5358
Public Made by Adomby adom
Hangzhou Ruimeng Tech Analog To Digital Converters (ADCs), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MS5358
Hangzhou Ruimeng Tech · Analog To Digital Converters (ADCs) · TSSOP-16
MS5358 from Hangzhou Ruimeng Tech, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AINR | input | Rch analog input pin; leave open if unused. |
| 2 | AINL | input | Lch analog input pin; leave open if unused. |
| 3 | CKS1 | input | Mode select 1 pin; must be connected to VA or AGND. |
| 4 | VCOM | power_out | Common-mode voltage output (VA/2) used as ADC input bias voltage; a 2.2uF capacitor is placed on this pin. |
| 5 | AGND | power_in | Analog ground pin; must be connected to the same ground as DGND. |
| 6 | VA | power_in | Analog power supply pin, 4.5 to 5.5V. |
| 7 | VD | power_in | Digital power supply pin, 2.7 to 3.6V. |
| 8 | DGND | power_in | Digital ground pin; must be connected to the same ground as AGND. |
| 9 | SDTO | output | Audio serial data output pin; output is low in power-down mode. |
| 10 | LRCK | bidirectional | Channel clock pin (input in slave mode, output in master mode); output is low in power-down mode when in master mode. |
| 11 | MCLK | input | Master clock input pin. |
| 12 | SCLK | bidirectional | Audio serial data clock pin (input in slave mode, output in master mode); output is low in power-down mode when in master mode. |
| 13 | PDN | input | Power-down and reset pin: H = power up, L = power down and reset; the device must be reset once after power-up. |
| 14 | DIF | input | Audio interface format select: H = 24-bit I2S compatible, L = 24-bit MSB justified. |
| 15 | CKS2 | input | Mode select 2 pin, sets master/slave and clock mode together with CKS1 and CKS0. |
| 16 | CKS0 | input | Mode select 0 pin, sets master/slave and clock mode together with CKS1 and CKS2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Hangzhou Ruimeng Tech |
| Package | TSSOP-16 |
| Category | Data Converters |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Analog supply voltage | VA | -0.3 | 6 | V | AGND, DGND = 0V | 2 | |
| Digital supply voltage | VD | -0.3 | 4.6 | V | AGND, DGND = 0V | 2 | |
| AGND-DGND difference | ΔGND | 0.3 | V | /AGND, DGND/ | 2 | ||
| Input current any pin except supplies | IIN | -10 | 10 | mA | 2 | ||
| Analog input voltage lower limit | VINA | -0.3 | V | AINL, AINR, CKS1; upper limit VA+0.3 | 2 | ||
| Digital input voltage lower limit | VIND | -0.3 | V | upper limit VD+0.3 | 2 | ||
| Ambient temperature | Ta | -20 | 85 | ℃ | 2 | ||
| Storage temperature | Tstg | -65 | 150 | ℃ | 2 | ||
| Analog supply voltage | VA | 4.5 | 5.5 | V | AGND, DGND = 0V | 3 | |
| Digital supply voltage | VD | 2.7 | 3.6 | V | AGND, DGND = 0V | 3 | |
| Input voltage | 2.7 | 3 | 3.3 | Vpp | 5 | ||
| SNDR fs=48kHz -1dBFS | 82 | 92 | dB | fs = 48kHz, BW = 20kHz, -1dBFS | 5 | ||
| SNDR fs=48kHz -60dBFS | 39 | dB | fs = 48kHz, BW = 20kHz, -60dBFS | 5 | |||
| SNDR fs=96kHz -1dBFS | 90 | dB | fs = 96kHz, BW = 40kHz, -1dBFS | 5 | |||
| SNDR fs=96kHz -60dBFS | 38 | dB | fs = 96kHz, BW = 40kHz, -60dBFS | 5 | |||
| Dynamic range | 90 | 102 | dB | -60dBFS, A-weighted | 5 | ||
| Signal to noise ratio | 94 | 102 | dB | A-weighted | 5 | ||
| Input impedance fs=48kHz | 13 | 20 | kΩ | fs = 48kHz | 5 | ||
| Input impedance fs=96kHz | 9 | 14 | kΩ | fs = 96kHz | 5 | ||
| Interchannel isolation | 89 | 95 | dB | 5 | |||
| Interchannel gain mismatch | 0.1 | 0.5 | dB | 5 | |||
| Gain drift | 100 | ppm/℃ | 5 | ||||
| Power supply rejection ratio | PSRR | 50 | dB | 1kHz, 50mVpp on VA and VD | 5 | ||
| Supply current VA | 10 | 16 | mA | Normal operation (PDN = H) | 5 | ||
| Supply current VD fs=48kHz | 2 | 5 | mA | Normal operation (PDN = H), fs = 48kHz | 5 | ||
| Supply current VD fs=96kHz | 4 | 9 | mA | Normal operation (PDN = H), fs = 96kHz | 5 | ||
| Power-down supply current VA+VD | 10 | 100 | uA | PDN = L | 5 | ||
| Passband ±0.1dB fs=48kHz | PB | 0 | 18.9 | kHz | fs = 48kHz, ±0.1dB | 6 | |
| Passband -0.2dB fs=48kHz | PB | 20 | kHz | fs = 48kHz, -0.2dB | 6 | ||
| Passband -3.0dB fs=48kHz | PB | 23 | kHz | fs = 48kHz, -3.0dB | 6 | ||
| Stopband fs=48kHz | SB | 28 | kHz | fs = 48kHz | 6 | ||
| Stopband attenuation fs=48kHz | SA | 68 | dB | fs = 48kHz | 6 | ||
| Passband ±0.1dB fs=96kHz | PB | 0 | 37.8 | kHz | fs = 96kHz, ±0.1dB | 6 | |
| Passband -0.2dB fs=96kHz | PB | 40 | kHz | fs = 96kHz, -0.2dB | 6 | ||
| Passband -3.0dB fs=96kHz | PB | 46 | kHz | fs = 96kHz, -3.0dB | 6 | ||
| Stopband fs=96kHz | SB | 56 | kHz | fs = 96kHz | 6 | ||
| Stopband attenuation fs=96kHz | SA | 68 | dB | fs = 96kHz | 6 | ||
| Input voltage high | VIH | 70 | %VD | 7 | |||
| Input voltage low | VIL | 30 | %VD | 7 | |||
| Output voltage low | VOL | 0.5 | V | Iout=1mA | 7 | ||
| Input leakage current | Iin | -10 | 10 | uA | 7 | ||
| MCLK frequency 512fs,256fs | fCLK | 2.048 | 24.576 | MHz | CL=20pF | 8 | |
| MCLK duty 512fs,256fs | dCLK | 40 | 60 | % | CL=20pF | 8 | |
| MCLK frequency 768fs,384fs | fCLK | 3.072 | 36.864 | MHz | CL=20pF | 8 | |
| MCLK duty 768fs,384fs | dCLK | 40 | 60 | % | CL=20pF | 8 | |
| LRCK frequency | fs | 8 | 96 | kHz | CL=20pF | 8 | |
| LRCK duty slave mode | 45 | 55 | % | Slave mode | 8 | ||
| SCLK period | tSCK | 160 | ns | Slave mode | 8 | ||
| SCLK low pulse width | tSCKL | 65 | ns | Slave mode | 8 | ||
| SCLK high pulse width | tSCKH | 65 | ns | Slave mode | 8 | ||
| LRCK edge to SCLK rising | tLRSH | 30 | ns | Slave mode | 8 | ||
| SCLK rising to LRCK edge | tSHLR | 30 | ns | Slave mode | 8 | ||
| PDN pulse width | tPD | 150 | ns | 8 | |||
| Operating temperature range | Ta | -20 | 85 | ℃ | 1 |
CAD (KiCad official)
- Symbol:
MS5358 - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
ms5358-etched.step/ms5358-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ms5358.step/ms5358.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Hangzhou Ruimeng Tech datasheet (18 pp, sha256
09c84d4ccb809fef, retrieved 2026-10-22, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MS5358
**Hangzhou Ruimeng Tech** · Analog To Digital Converters (ADCs) · TSSOP-16
MS5358 from Hangzhou Ruimeng Tech, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AINR | input | Rch analog input pin; leave open if unused. |
| 2 | AINL | input | Lch analog input pin; leave open if unused. |
| 3 | CKS1 | input | Mode select 1 pin; must be connected to VA or AGND. |
| 4 | VCOM | power_out | Common-mode voltage output (VA/2) used as ADC input bias voltage; a 2.2uF capacitor is placed on this pin. |
| 5 | AGND | power_in | Analog ground pin; must be connected to the same ground as DGND. |
| 6 | VA | power_in | Analog power supply pin, 4.5 to 5.5V. |
| 7 | VD | power_in | Digital power supply pin, 2.7 to 3.6V. |
| 8 | DGND | power_in | Digital ground pin; must be connected to the same ground as AGND. |
| 9 | SDTO | output | Audio serial data output pin; output is low in power-down mode. |
| 10 | LRCK | bidirectional | Channel clock pin (input in slave mode, output in master mode); output is low in power-down mode when in master mode. |
| 11 | MCLK | input | Master clock input pin. |
| 12 | SCLK | bidirectional | Audio serial data clock pin (input in slave mode, output in master mode); output is low in power-down mode when in master mode. |
| 13 | PDN | input | Power-down and reset pin: H = power up, L = power down and reset; the device must be reset once after power-up. |
| 14 | DIF | input | Audio interface format select: H = 24-bit I2S compatible, L = 24-bit MSB justified. |
| 15 | CKS2 | input | Mode select 2 pin, sets master/slave and clock mode together with CKS1 and CKS0. |
| 16 | CKS0 | input | Mode select 0 pin, sets master/slave and clock mode together with CKS1 and CKS2. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Hangzhou Ruimeng Tech |
| Package | TSSOP-16 |
| Category | Data Converters |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Analog supply voltage | VA | -0.3 | | 6 | V | AGND, DGND = 0V | 2 |
| Digital supply voltage | VD | -0.3 | | 4.6 | V | AGND, DGND = 0V | 2 |
| AGND-DGND difference | ΔGND | | | 0.3 | V | /AGND, DGND/ | 2 |
| Input current any pin except supplies | IIN | -10 | | 10 | mA | | 2 |
| Analog input voltage lower limit | VINA | -0.3 | | | V | AINL, AINR, CKS1; upper limit VA+0.3 | 2 |
| Digital input voltage lower limit | VIND | -0.3 | | | V | upper limit VD+0.3 | 2 |
| Ambient temperature | Ta | -20 | | 85 | ℃ | | 2 |
| Storage temperature | Tstg | -65 | | 150 | ℃ | | 2 |
| Analog supply voltage | VA | 4.5 | | 5.5 | V | AGND, DGND = 0V | 3 |
| Digital supply voltage | VD | 2.7 | | 3.6 | V | AGND, DGND = 0V | 3 |
| Input voltage | | 2.7 | 3 | 3.3 | Vpp | | 5 |
| SNDR fs=48kHz -1dBFS | | 82 | 92 | | dB | fs = 48kHz, BW = 20kHz, -1dBFS | 5 |
| SNDR fs=48kHz -60dBFS | | | 39 | | dB | fs = 48kHz, BW = 20kHz, -60dBFS | 5 |
| SNDR fs=96kHz -1dBFS | | | 90 | | dB | fs = 96kHz, BW = 40kHz, -1dBFS | 5 |
| SNDR fs=96kHz -60dBFS | | | 38 | | dB | fs = 96kHz, BW = 40kHz, -60dBFS | 5 |
| Dynamic range | | 90 | 102 | | dB | -60dBFS, A-weighted | 5 |
| Signal to noise ratio | | 94 | 102 | | dB | A-weighted | 5 |
| Input impedance fs=48kHz | | 13 | 20 | | kΩ | fs = 48kHz | 5 |
| Input impedance fs=96kHz | | 9 | 14 | | kΩ | fs = 96kHz | 5 |
| Interchannel isolation | | 89 | 95 | | dB | | 5 |
| Interchannel gain mismatch | | | 0.1 | 0.5 | dB | | 5 |
| Gain drift | | | 100 | | ppm/℃ | | 5 |
| Power supply rejection ratio | PSRR | | 50 | | dB | 1kHz, 50mVpp on VA and VD | 5 |
| Supply current VA | | | 10 | 16 | mA | Normal operation (PDN = H) | 5 |
| Supply current VD fs=48kHz | | | 2 | 5 | mA | Normal operation (PDN = H), fs = 48kHz | 5 |
| Supply current VD fs=96kHz | | | 4 | 9 | mA | Normal operation (PDN = H), fs = 96kHz | 5 |
| Power-down supply current VA+VD | | | 10 | 100 | uA | PDN = L | 5 |
| Passband ±0.1dB fs=48kHz | PB | 0 | 18.9 | | kHz | fs = 48kHz, ±0.1dB | 6 |
| Passband -0.2dB fs=48kHz | PB | | 20 | | kHz | fs = 48kHz, -0.2dB | 6 |
| Passband -3.0dB fs=48kHz | PB | | 23 | | kHz | fs = 48kHz, -3.0dB | 6 |
| Stopband fs=48kHz | SB | 28 | | | kHz | fs = 48kHz | 6 |
| Stopband attenuation fs=48kHz | SA | 68 | | | dB | fs = 48kHz | 6 |
| Passband ±0.1dB fs=96kHz | PB | 0 | 37.8 | | kHz | fs = 96kHz, ±0.1dB | 6 |
| Passband -0.2dB fs=96kHz | PB | | 40 | | kHz | fs = 96kHz, -0.2dB | 6 |
| Passband -3.0dB fs=96kHz | PB | | 46 | | kHz | fs = 96kHz, -3.0dB | 6 |
| Stopband fs=96kHz | SB | 56 | | | kHz | fs = 96kHz | 6 |
| Stopband attenuation fs=96kHz | SA | 68 | | | dB | fs = 96kHz | 6 |
| Input voltage high | VIH | 70 | | | %VD | | 7 |
| Input voltage low | VIL | | | 30 | %VD | | 7 |
| Output voltage low | VOL | | | 0.5 | V | Iout=1mA | 7 |
| Input leakage current | Iin | -10 | | 10 | uA | | 7 |
| MCLK frequency 512fs,256fs | fCLK | 2.048 | | 24.576 | MHz | CL=20pF | 8 |
| MCLK duty 512fs,256fs | dCLK | 40 | | 60 | % | CL=20pF | 8 |
| MCLK frequency 768fs,384fs | fCLK | 3.072 | | 36.864 | MHz | CL=20pF | 8 |
| MCLK duty 768fs,384fs | dCLK | 40 | | 60 | % | CL=20pF | 8 |
| LRCK frequency | fs | 8 | | 96 | kHz | CL=20pF | 8 |
| LRCK duty slave mode | | 45 | | 55 | % | Slave mode | 8 |
| SCLK period | tSCK | 160 | | | ns | Slave mode | 8 |
| SCLK low pulse width | tSCKL | 65 | | | ns | Slave mode | 8 |
| SCLK high pulse width | tSCKH | 65 | | | ns | Slave mode | 8 |
| LRCK edge to SCLK rising | tLRSH | 30 | | | ns | Slave mode | 8 |
| SCLK rising to LRCK edge | tSHLR | 30 | | | ns | Slave mode | 8 |
| PDN pulse width | tPD | 150 | | | ns | | 8 |
| Operating temperature range | Ta | -20 | | 85 | ℃ | | 1 |
## CAD (KiCad official)
- Symbol: `MS5358`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `ms5358-etched.step` / `ms5358-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ms5358.step` / `ms5358.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Hangzhou Ruimeng Tech datasheet](docs/ms5358-datasheet.pdf) (18 pp, sha256 `09c84d4ccb809fef`, retrieved 2026-10-22, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ms5358-datasheet.pdf)