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Name	Last commit message	Last updated
docs	ms5351m: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
viewers	ms5351m: viewers · Ray	27d ago
ms5351m-etched.fit.json	ms5351m: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
ms5351m-etched.glb	ms5351m: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
ms5351m-etched.step	ms5351m: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
ms5351m.glb	Publish 0.1.0 · Ray	27d ago
ms5351m.kicad_mod	Publish 0.1.0 · Ray	27d ago
ms5351m.kicad_sym	Publish 0.1.0 · Ray	27d ago
ms5351m.lbr	Publish 0.1.0 · Ray	27d ago
ms5351m.step	Publish 0.1.0 · Ray	27d ago
package.json	Publish 0.1.0 · Ray	27d ago
page.json	Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray	11d ago
README.md	ms5351m: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray	17d ago

MS5351M

Hangzhou Ruimeng Tech · Clock Generators, PLLs, Frequency Synthesizers · MSOP-10

MS5351M from Hangzhou Ruimeng Tech, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Internal core circuit supply. Recommended 2.7 V to 3.3 V (typ 3.0 V); absolute max -0.5 V to 3.6 V. Decouple locally.
2	XA	input	External crystal input pin. Connects to one terminal of a 25 MHz or 27 MHz crystal (CL 6-12 pF, ESR <=150 Ω). Input voltage range -0.3 V to 1.1 V.
3	XB	input	External crystal input pin. Connects to the other terminal of the 25 MHz or 27 MHz crystal. Input voltage range -0.3 V to 1.1 V.
4	SCL	input	I2C clock input. Requires an external pull-up resistor of at least 1 kΩ to VDDO. Supports 100 kbps standard and 400 kbps fast mode.
5	SDA	bidirectional	I2C data input/output (open-drain). Requires an external pull-up resistor of at least 1 kΩ to VDDO. Supports 100 kbps standard and 400 kbps fast mode.
6	CLK2	output	Output clock channel 2. Programmable frequency from 2.5 kHz to 200 MHz. Output impedance ~50 Ω at 3.3 V VDDO high-drive; drive up to 5 mA.
7	VDDO	power_in	Output stage supply. Independent from VDD; supports 1.8 V, 2.5 V, or 3.3 V nominal (abs max -0.5 V to 3.8 V) to set output logic swing.
8	GND	power_in	Reference ground for all supplies and signal returns.
9	CLK1	output	Output clock channel 1. Programmable frequency from 2.5 kHz to 200 MHz. Output impedance ~50 Ω at 3.3 V VDDO high-drive; drive up to 5 mA.
10	CLK0	output	Output clock channel 0. Programmable frequency from 2.5 kHz to 200 MHz. Output impedance ~50 Ω at 3.3 V VDDO high-drive; drive up to 5 mA.

Key specifications

Parameter	Value
Manufacturer	Hangzhou Ruimeng Tech
Package	MSOP-10
Category	Clock/Timing
Pins	10

Ordering variants

Same part, different packaging or reel option.

MS5351M

CAD (KiCad official)

Symbol: MS5351M
Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
3D model: MSOP-10 (KiCad packages3D, STEP)
3D model files: ms5351m-etched.step / ms5351m-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ms5351m.step / ms5351m.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Hangzhou Ruimeng Tech datasheet (11 pp, sha256 d73062cbbb8e9efa, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF