# MS51FB9AE

**Nuvoton Tech** · Microcontrollers (MCU/MPU/SOC) · TSSOP-20

MS51FB9AE from Nuvoton Tech, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P0.5 | bidirectional | Port 0 bit 5 GPIO, multiplexed with PWM0_CH2, IC6, T0 (Timer/Counter 0 external count input or toggle output) and ADC_CH4. |
| 2 | P0.6 | bidirectional | Port 0 bit 6 GPIO, multiplexed with UART0_TXD (UART0 data transmit, swappable with P0.7 via UART0PX) and ADC_CH3. |
| 3 | P0.7 | bidirectional | Port 0 bit 7 GPIO, multiplexed with UART0_RXD (UART0 data receive, swappable with P0.6 via UART0PX) and ADC_CH2. |
| 4 | P2.0 / nRESET | input | External reset pin is a Schmitt-trigger input with internal pull-up (about 45-60 kΩ at 5.5 V); it must be held low for at least 24 system clock cycles to generate a hardware reset, and P2.0 is available only when CONFIG0.2 (RPD) is 0. |
| 5 | P3.0 | bidirectional | Port 3 bit 0 GPIO (available when the internal oscillator is used), also external interrupt 0 input (INT0), OSCIN external clock input in ECLK mode, and ADC channel 1 input. |
| 6 | P1.7 | bidirectional | Port 1 bit 7 GPIO, also external interrupt 1 input (INT1, active low) and ADC channel 0 input. |
| 7 | VSS | power_in | Power ground, the negative supply terminal; all VSS and VDD pins must be connected to the external supply. |
| 8 | P1.6 | bidirectional | Port 1 bit 6 GPIO, multiplexed with ICE_DAT (ICP programming data input/output), UART1_TXD (UART1 data transmit) and I2C0_SDA (I2C data, remappable via I2CPX). |
| 9 | VDD | power_in | Power supply positive terminal; operating voltage 2.4 V to 5.5 V with respect to VSS. |
| 10 | P1.5 / PWM0_CH5 / IC7 / SPI0_SS | bidirectional | Port 1 bit 5 GPIO, multiplexed with PWM0_CH5, IC7 (Timer 2 input capture channel 7) and SPI0_SS (SPI slave select input). |
| 11 | P1.4 / PWM0_CH1 / I2C0_SDA / PWM0_BRAKE | bidirectional | Port 1 bit 4 GPIO, multiplexed with PWM0_CH1, I2C0_SDA (I2C data) and PWM0_BRAKE (PWM fault brake input). |
| 12 | P1.3 | bidirectional | Port 1 bit 3 GPIO, multiplexed with I2C0_SCL (I2C clock, remappable via I2CPX) and STADC (external ADC start trigger, remappable via STADCPX). |
| 13 | P1.2 / PWM0_CH0 / IC0 | bidirectional | Port 1 bit 2 GPIO, multiplexed with PWM0_CH0 (PWM output channel 0) and IC0 (Timer 2 input capture channel 0). |
| 14 | P1.1 | bidirectional | Port 1 bit 1 GPIO, multiplexed with PWM0_CH1, IC1, ADC_CH7 and CLKO (system clock output). |
| 15 | P1.0 / PWM0_CH2 / IC2 / SPI0_CLK | bidirectional | Port 1 bit 0 GPIO, multiplexed with PWM0_CH2, IC2 (Timer 2 input capture channel 2) and SPI0_CLK (SPI clock). |
| 16 | P0.0 | bidirectional | Port 0 bit 0 GPIO, multiplexed with PWM0_CH3, SPI0_MOSI (SPI master out / slave in), IC3 and T1 (Timer/Counter 1 external count input or toggle output). |
| 17 | P0.1 / PWM0_CH4 / IC4 / SPI0_MISO | bidirectional | Port 0 bit 1 GPIO, multiplexed with PWM0_CH4, IC4 and SPI0_MISO (SPI master in / slave out). |
| 18 | P0.2 | bidirectional | Port 0 bit 2 GPIO, multiplexed with ICE_CLK (emulation and ICP programming clock input), UART1_RXD (UART1 data receive) and I2C0_SCL (I2C clock, remappable via I2CPX). |
| 19 | P0.3 / PWM0_CH5 / IC5 / ADC_CH6 | bidirectional | Port 0 bit 3 GPIO, multiplexed with PWM0_CH5, IC5 and ADC_CH6 input. |
| 20 | P0.4 | bidirectional | Port 0 bit 4 GPIO, multiplexed with PWM0_CH3, IC3, ADC_CH5 input and STADC (external ADC start trigger). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nuvoton Tech |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |

## CAD (KiCad official)

- Symbol: `MS51FB9AE`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `ms51fb9ae-etched.step` / `ms51fb9ae-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ms51fb9ae.step` / `ms51fb9ae.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nuvoton Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883751598231552) (47 pp, sha256 `29472fd0938c9bf9`, retrieved 2026-10-09, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ms51fb9ae-datasheet.pdf)