# MS5193T

**Hangzhou Ruimeng Tech** · Analog To Digital Converters (ADC) · TSSOP-16

MS5193T from Hangzhou Ruimeng Tech, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCLK | input | Serial clock input for data transfer with the ADC, with Schmitt-trigger input suited to opto-isolated interfaces; it may be continuous or non-continuous. |
| 2 | CLK | bidirectional | Clock pin that outputs the internal clock or, when the internal clock is disabled, accepts an external clock so multiple ADCs can run synchronized conversions. |
| 3 | CS | input | Active-low chip select that selects the ADC and acts as a frame sync; it can be hard-wired low for 3-wire operation via SCLK, DIN and DOUT. |
| 4 | IOUT1 | output | Output of the internal excitation current source, programmable to 10 uA, 210 uA or 1 mA, to which IEXC1 or IEXC2 can be switched. |
| 5 | AIN1+ | input | Positive input of analog channel 1. |
| 6 | AIN1- | input | Negative input of analog channel 1. |
| 7 | AIN2+ | input | Positive input of analog channel 2. |
| 8 | AIN2- | input | Negative input of analog channel 2. |
| 9 | REFIN+/AIN3+ | input | Positive reference input (typically 2.5 V across REFIN+ to REFIN-, usable from 0.1 V up to AVDD); also functions as positive input of analog channel 3. |
| 10 | REFIN-/AIN3- | input | Negative reference input, which may range from GND to AVDD-0.1 V; also functions as negative input of analog channel 3. |
| 11 | IOUT2 | output | Output of the internal excitation current source, programmable to 10 uA, 210 uA or 1 mA, to which IEXC1 or IEXC2 can be switched. |
| 12 | GND | power_in | Ground reference for the device. |
| 13 | AVDD | power_in | Analog supply voltage, 2.7 V to 5.25 V. |
| 14 | DVDD | power_in | Digital interface supply, 2.7 V to 5.25 V; it is independent of AVDD and sets the logic levels of the serial interface pins. |
| 15 | DOUT/RDY | output | Serial data output that also serves as data-ready flag, going low when a conversion completes and returning high after the data is read or before the next update; data is valid on the SCLK falling edge when CS is low. |
| 16 | DIN | input | Serial data input that feeds the ADC input shift register, which transfers data into the control register. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Hangzhou Ruimeng Tech |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 模拟电源电压 AVDD | AVDD | 2.7 |  | 5.25 | V |  | 3 |
| 数字接口电源电压 DVDD | DVDD | 2.7 |  | 5.25 | V |  | 3 |
| 外部基准电压 (REFIN+)-(REFIN-) 范围 |  | 0.1 |  |  | V | 上限为 AVDD | 2 |
| 仪表放大器有效时共模电压 (AIN(+)+AIN(-))/2 |  | 0.5 |  |  | V | 仪表放大器有效(增益≥4) | 6 |
| 复位后访问片内寄存器前等待时间 |  | 500 |  |  | µs | 启动复位操作后 | 7 |
| SCLK高脉冲宽度 | t3 | 100 |  |  | ns |  | 3 |
| SCLK低脉冲宽度 | t4 | 100 |  |  | ns |  | 3 |
| CS下降沿至DOUT/RDY激活时间 | t1 | 0 |  |  | ns |  | 3 |
| CS下降沿至DOUT/RDY激活时间 | t1 |  |  | 60 | ns | DVDD = 4.75V to 5.25V | 3 |
| CS下降沿至DOUT/RDY激活时间 | t1 |  |  | 80 | ns | DVDD = 2.7V to 3.6V | 3 |
| SCLK下降沿至数据有效延迟 | t2 | 0 |  |  | ns |  | 4 |
| SCLK下降沿至数据有效延迟 | t2 |  |  | 60 | ns | DVDD = 4.75V to 5.25V | 4 |
| SCLK下降沿至数据有效延迟 | t2 |  |  | 80 | ns | DVDD = 2.7V to 3.6V | 4 |
| CS无效沿后总线撤出时间 | t5 | 10 |  | 80 | ns |  | 4 |
| SCLK上升沿至CS无效沿 | t6 | 0 |  |  | ns |  | 4 |
| SCLK上升沿至CS无效沿 | t7 | 10 |  |  | ns |  | 4 |
| CS下降沿至SCLK下降沿建立时间 | t8 | 0 |  |  | ns |  | 4 |
| 数据有效至SCLK沿建立时间 | t9 | 30 |  |  | ns |  | 4 |
| 数据有效至SCLK沿保持时间 | t10 | 25 |  |  | ns |  | 4 |
| CS上升沿至SCLK沿保持时间 | t11 | 0 |  |  | ns |  | 4 |
| 内部基准电压 |  |  | 1.17 |  | V |  | 7 |
| 内部基准电压温漂 |  |  | 10 |  | ppm/°C |  | 7 |
| 外部基准电压典型值 (REFIN+)-(REFIN-) |  |  | 2.5 |  | V |  | 2 |

## CAD (KiCad official)

- Symbol: `MS5193T`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `ms5193t-etched.step` / `ms5193t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ms5193t.step` / `ms5193t.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Hangzhou Ruimeng Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908701864366080) (19 pp, sha256 `e9c5da179efa117b`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ms5193t-datasheet.pdf)