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MR45V032AMAZBATL
Public Made by Adomby adom
ROHM Semicon Pre-ordered Chips, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMR45V032AMAZBATL
ROHM Semicon · Pre-ordered Chips · SOP-8
MR45V032AMAZBATL from ROHM Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip Select (negative logic): a low input latches the address, activates the FeRAM, and enables a read or write operation; CS# should be low during hold operation. |
| 2 | SO | tri_state | Serial output; the pin is High-Z when CS# is not active or when HOLD# is low. |
| 3 | WP# | input | Write Protect (negative logic) controls write operations to the status register (BP0, BP1) and should be fixed low or high during write operations. |
| 4 | VSS | power_in | Ground; connect to system ground (0 V). |
| 5 | SI | input | Serial input for operation code, addresses, and data; SI is don't care while HOLD# is low. |
| 6 | SCK | input | Serial clock input; inputs are latched on the rising edge and outputs occur on the falling edge, with operating frequency up to 15 MHz. |
| 7 | HOLD# | input | Hold (negative logic) suspends serial communication without disabling the chip; when low, SO is High-Z and SI/SCK are don't care, and CS# must remain low. |
| 8 | VCC | power_in | Power supply; the specified recommended operating range is 2.7 V to 3.6 V (3.3 V typ). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | SOP-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Pin Voltage (Input Signal) | VIN | -0.5 | V | 12 | |||
| Pin Voltage (Input/Output Voltage) | VINQ, VOUTQ | -0.5 | V | 12 | |||
| Power Supply Voltage | VCC | -0.5 | 4 | V | 12 | ||
| Storage Temperature (Extended Temperature Version) | Tstg | -55 | 125 | °C | 12 | ||
| Operating Temperature (Extended Temperature Version) | Topr | -40 | 85 | °C | 12 | ||
| Power Dissipation | PD | 1000 | mW | 12 | |||
| Allowable Input Current | IIN | -20 | 20 | mA | Ta=25°C | 12 | |
| Allowable Output Current | IOUT | -20 | 20 | mA | Ta=25°C | 12 | |
| Power Supply Voltage | VCC | 2.7 | 3.3 | 3.6 | V | 13 | |
| Ground Voltage | VSS | 0 | 0 | 0 | V | 13 | |
| Input Low Voltage | VIL | -0.3 | V | 13 | |||
| Undershoot tolerance (L input) | VIL | -1 | V | Undershoot, pulse width 20ns | 13 | ||
| Input Leakage Current | ILI | -10 | 10 | µA | 14 | ||
| Output Leakage Current | ILO | -10 | 10 | µA | 14 | ||
| Power Supply Current (Standby) | ICCS | 400 | µA | VIN=0.2V or VCC-0.2V | 14 | ||
| Power Supply Current (Operating) | ICCA | 10 | mA | VIN=0.2V or VCC-0.2V, SCK=15MHz, IOUT=0mA | 14 | ||
| Clock frequency | fC | 15 | MHz | 15 | |||
| CS# Active setup time | tSLCH | 10 | ns | 15 | |||
| CS# In-active setup-time | tSHCH | 10 | ns | 15 | |||
| CS# De-select time | tSHSL | 10 | ns | 15 | |||
| CS# Active hold time | tCHSH | 10 | ns | 15 | |||
| CS# In-active hold-time | tCHSL | 10 | ns | 15 | |||
| SCK High time | tCH | 30 | ns | Note 1: tCH+tCL≥1/fC | 15 | ||
| SCK Low time | tCL | 30 | ns | Note 1: tCH+tCL≥1/fC | 15 | ||
| SCK Rise time | tCLCH | 1 | ns | Note 2: sample value | 15 | ||
| SCK Fall time | tCHCL | 1 | ns | Note 2: sample value | 15 | ||
| Data Setup time | tDVCH | 5 | ns | 15 | |||
| Data Hold time | tCHDX | 5 | ns | 15 | |||
| SCK Low Hold time after HOLD# inactive | tHHCH | 10 | ns | 15 | |||
| SCK Low Hold time after HOLD# active | tHLCH | 10 | ns | 15 | |||
| SCK High Setup time before HOLD# active | tCHHL | 10 | ns | 15 | |||
| SCK High Setup time before HOLD# inactive | tCHHH | 10 | ns | 15 | |||
| Output disable time | tSHQZ | 20 | ns | Note 2: sample value | 15 | ||
| SCK Low to Output Valid time | tCLQV | 35 | ns | 15 | |||
| Output Hold time | tCLQX | 0 | ns | 15 | |||
| Output Rise time | tQLQH | 50 | ns | Note 2: sample value | 15 | ||
| Output Fall time | tQHQL | 50 | ns | Note 2: sample value | 15 | ||
| HOLD# High to Output Low impedance time | tHHQX | 20 | ns | Note 2: sample value | 15 | ||
| HOLD# High to Output High impedance time | tHLQZ | 20 | ns | Note 2: sample value | 15 | ||
| Power-On CS# High Hold Time | tVHEL | 20 | s | 17 | |||
| Power-Off CS# High Hold Time | tEHVL | 100 | ns | 17 | |||
| Power-On Interval Time | tVLVH | 1 | s | 17 | |||
| Power-On time | tR | 50 | s/V | 17 | |||
| Power-Off time | tF | 100 | s/V | 17 | |||
| Data Retention | 10 | Year | 18 | ||||
| Input Capacitance | CIN | 10 | pF | VIN = VOUT = GND, f = 1MHz, Ta = 25°C | 18 | ||
| Input/Output Capacitance | COUT | 10 | pF | VIN = VOUT = GND, f = 1MHz, Ta = 25°C | 18 |
CAD (KiCad official)
- Symbol:
MR45V032AMAZBATL - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
mr45v032amazbatl-etched.step/mr45v032amazbatl-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mr45v032amazbatl.step/mr45v032amazbatl.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ROHM Semicon datasheet (20 pp, sha256
38a1609a7ee1eb3e, retrieved 2026-10-30, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).