component
MPQ6528GVE-AEC1-Z
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MONOLITHIC POWER SYSTEMS Global Sourcing Parts, QFN-28(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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Datasheet
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README
markdownMPQ6528GVE-AEC1-Z
MONOLITHIC POWER SYSTEMS · Global Sourcing Parts · QFN-28(4x5)
MPQ6528GVE-AEC1-Z from MONOLITHIC POWER SYSTEMS, in a QFN-28(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply voltage with a 5V to 60V operating range; bypass with a ceramic capacitor to ground, and bulk capacitors may be required. |
| 2 | CPA | passive | Charge pump capacitor connection; connect a ceramic capacitor between CPA and CPB, rated for the maximum VIN. |
| 3 | CPB | passive | Charge pump capacitor connection terminal, paired with CPA through the flying capacitor. |
| 4 | VREG | power_out | Gate driver supply output (9.5V to 13V for VIN of 5.5V to 60V); connect a ceramic capacitor between VREG and ground. |
| 5 | BSTA | passive | Phase A bootstrap connection; connect a ceramic capacitor between BSTA and SHA, with CBST not exceeding 1µF. |
| 6 | SHA | passive | Phase A high-side MOSFET source connection, the phase A switching node. |
| 7 | GHA | output | Phase A high-side MOSFET gate driver output, with 0.8A maximum source and 1A maximum sink current. |
| 8 | GLA | output | Phase A low-side MOSFET gate driver output, with 0.8A maximum source and 1A maximum sink current. |
| 9 | NC | unconnected | No connection. |
| 10 | NC | unconnected | No connection. |
| 11 | NC | unconnected | No connection. |
| 12 | NC | unconnected | No connection. |
| 13 | BSTB | passive | Phase B bootstrap connection; connect a ceramic capacitor between BSTB and SHB, with CBST not exceeding 1µF. |
| 14 | SHB | passive | Phase B high-side MOSFET source connection, the phase B switching node. |
| 15 | GHB | output | Phase B high-side MOSFET gate driver output, with 0.8A maximum source and 1A maximum sink current. |
| 16 | GLB | output | Phase B low-side MOSFET gate driver output, with 0.8A maximum source and 1A maximum sink current. |
| 17 | LSS | passive | Source connection for the phase A and phase B low-side MOSFETs, used for the LSS shunt resistor; the LSS OCP threshold is typically 0.5V. |
| 18 | PWMB | input | Phase B PWM input; pull high to drive phase B high and low to drive phase B low, with an internal pull-down resistor. |
| 19 | GND | power_in | Ground. |
| 20 | PWMA | input | Phase A PWM input; pull high to drive phase A high and low to drive phase A low, with an internal pull-down resistor. |
| 21 | ENB | input | Phase B enable input; pull high to turn the phase B gate driver on and low to turn it off, with an internal pull-down resistor. |
| 22 | GND | power_in | Ground. |
| 23 | ENA | input | Phase A enable input; pull high to turn the phase A gate driver on and low to turn it off, with an internal pull-down resistor. |
| 24 | nFAULT | output | Fault indicator open-drain output; pulled low when a fault occurs and requires an external pull-up resistor. |
| 25 | nSLEEP | input | Sleep mode input; pull low to enter low-power sleep mode and high to exit, with an internal pull-down resistor. |
| 26 | OC_REF | input | Over-current protection reference voltage (VREF) input, with a recommended range of 0.125V to 2.4V. |
| 27 | DT | passive | Dead time setting; connect a resistor to ground, with tDEAD(ns) = 60 x RDT(kΩ). |
| 28 | GND | power_in | Ground. |
| 29 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MONOLITHIC POWER SYSTEMS |
| Package | QFN-28(4x5) |
| Category | Global Sourcing Parts |
| Pins | 29 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 5 | 60 | V | 6 | ||
| Quiescent current | IQ | 1.8 | 4 | mA | nSLEEP = 1, gate driver is not switching | 6 | |
| Input current high | IIN_HIGH | -20 | 20 | µA | VIN_HIGH = 5V | 6 | |
| Input current low | IIN_LOW | -20 | 20 | µA | VIN_LOW = 0.8V | 6 | |
| Output low voltage | VOUT_LOW | 0.5 | V | IOUT = 5mA | 6 | ||
| UVLO rising threshold | VIN_RISING | 3.2 | 3.9 | 5 | V | 6 | |
| VREG rising threshold | VREG_RISING | 6.8 | 7.6 | 8.4 | V | 6 | |
| VREG hysteresis | VREG_HYS | 0.65 | 1 | V | 6 | ||
| OC_REF threshold | VOC_REF | 0.8 | 1 | 1.2 | V | VOC_REF = 1V | 6 |
| OC_REF threshold | VOC_REF | 2.18 | 2.4 | 2.62 | V | VOC_REF = 2.4V | 6 |
| LSS OCP threshold | VOCP_LSS | 0.4 | 0.5 | 0.6 | V | 6 | |
| Bootstrap diode forward voltage | VBST_FOR | 1 | V | ID = 10mA | 6 | ||
| Bootstrap diode forward voltage | VBST_FOR | 1.4 | V | ID = 100mA | 6 | ||
| VREG output voltage | VREG | 9.5 | 11.5 | 13 | V | VIN = 5.5V - 60V | 6 |
| Gate driver pull-up resistance | RPU | 8 | Ω | VDS = 1V | 6 | ||
| HS-FET gate driver pull-down resistance | RPD_HS | 1 | 6 | Ω | VDS = 1V | 6 | |
| LS-FET gate driver pull-down resistance | RPD_LS | 0.7 | 6.7 | Ω | VDS = 1V | 6 | |
| Thermal shutdown | TSD | 190 | °C | 6 | |||
| Thermal shutdown hysteresis | ΔTSD | 30 | °C | 6 | |||
| Quiescent sleep current | ISLEEP | 2.5 | µA | nSLEEP = 0, sleep mode | 6 | ||
| Input logic low threshold | VIN_LOW | 0.8 | V | 6 | |||
| Input logic high threshold | VIN_HIGH | 2 | V | 6 | |||
| nSLEEP pull-down current | IPD_SLEEP | 1 | µA | 6 | |||
| Internal pull-down resistance | RPD | 880 | kΩ | All logic inputs except nSLEEP | 6 | ||
| Output high leakage current | IOUT_HIGH | 1 | µA | VOUT = 3.3V | 6 | ||
| UVLO hysteresis | VIN_HYS | 200 | mV | 6 | |||
| VREG start-up delay | tDELAY_REG | 880 | µs | 6 | |||
| Over-current protection deglitch time | tOCP | 3 | µs | 6 | |||
| Sleep mode wake-up time | tSLEEP | 1 | ms | 6 | |||
| Maximum source current | ISOURCE_MAX | 0.8 | A | 6 | |||
| Maximum sink current | ISINK_MAX | 1 | A | 6 | |||
| LS-FET passive pull-down resistance | RPPD_LS | 590 | kΩ | 6 | |||
| LS-FET automatic on time | tLS | 2 | µs | At ENx rising edge | 7 | ||
| Charge pump frequency | fCP | 110 | kHz | 7 | |||
| Dead time | tDEAD | 700 | ns | RDT = 10kΩ | 7 | ||
| Dead time | tDEAD | 90 | ns | DT tied to GND | 7 | ||
| Dead time | tDEAD | 5.7 | µs | RDT = 100kΩ | 7 | ||
| Input voltage | VIN | -0.3 | 62 | V | 5 | ||
| CPA voltage | CPA | -0.3 | 55 | V | 5 | ||
| CPB voltage | CPB | -0.3 | 12.5 | V | 5 | ||
| VREG voltage | VREG | -0.3 | 13 | V | 5 | ||
| BSTA/B voltage | BSTA/B | -0.3 | 70 | V | 5 | ||
| GHA, GHB voltage (continuous) | GHA, GHB | -0.3 | 70 | V | continuous | 5 | |
| GHA, GHB voltage (transient) | GHA, GHB | -8 | 70 | V | transient, <2µs | 5 | |
| SHA, SHB voltage (continuous) | SHA, SHB | -0.3 | 65 | V | continuous | 5 | |
| SHA, SHB voltage (transient) | SHA, SHB | -8 | 65 | V | transient, <2µs | 5 | |
| GLA, GLB voltage (continuous) | GLA, GLB | -0.3 | 13 | V | continuous | 5 | |
| GLA, GLB voltage (transient) | GLA, GLB | -2 | 13 | V | transient, <2µs | 5 | |
| LSS voltage (continuous) | LSS | -0.3 | 1 | V | continuous | 5 | |
| LSS voltage (transient) | LSS | -2 | 2 | V | transient, <2µs | 5 | |
| All other pins voltage | -0.3 | 6.5 | V | to AGND | 5 | ||
| Continuous power dissipation | PD | 3.1 | W | TA = 25°C, QFN-28 (4mmx5mm) | 5 | ||
| Storage temperature | -55 | 150 | °C | 5 | |||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Input voltage | VIN | 5 | 60 | V | 5 | ||
| OC_REF voltage | VOC_REF | 0.125 | 2.4 | V | 5 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Junction-to-ambient thermal resistance | θJA | 40 | °C/W | JESD51-7, 4-layer PCB | 5 | ||
| Junction-to-case thermal resistance | θJC | 9 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
MPQ6528GVE-AEC1-Z - Footprint:
Package_DFN_QFN:QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm - 3D model: QFN-28(4x5) (KiCad packages3D, STEP)
- 3D model files:
mpq6528gve-aec1-z-etched.step/mpq6528gve-aec1-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mpq6528gve-aec1-z.step/mpq6528gve-aec1-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MONOLITHIC POWER SYSTEMS datasheet (21 pp, sha256
6c6a9a48f18e3489, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).