component

MPQ4570GF-Z

Public Made by Adom

by adom

Monolithic Power Systems DC-DC Converters, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)mpq4570gf-zfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 13d ago
viewers mpq4570gf-z: viewers · Ray 13d ago
mpq4570gf-z-etched.glb Publish 0.1.0 · Ray 13d ago
mpq4570gf-z-etched.step mpq4570gf-z: factory component page (tier=lcsc) · Ray 13d ago
mpq4570gf-z-hero.glb mpq4570gf-z: hero GLB from the etched model (keeps the MPN mark) · Ray 13d ago
mpq4570gf-z-hero.overlay.json Publish 0.1.0 · Ray 13d ago
mpq4570gf-z.glb Publish 0.1.0 · Ray 13d ago
mpq4570gf-z.kicad_mod Publish 0.1.0 · Ray 13d ago
mpq4570gf-z.kicad_sym Publish 0.1.0 · Ray 13d ago
mpq4570gf-z.lbr Publish 0.1.0 · Ray 13d ago
mpq4570gf-z.step Publish 0.1.0 · Ray 13d ago
package.json Publish 0.1.0 · Ray 13d ago
page.json Set visibility: public · Ray 13d ago
README.md Publish 0.1.0 · Ray 13d ago

MPQ4570GF-Z

Monolithic Power Systems · DC-DC Converters · TSSOP-20

MPQ4570GF-Z from Monolithic Power Systems, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP passive Compensation network node, the output of the internal error amplifier; connect a series resistor and capacitor between this pin and GND to set loop compensation.
2 FB input Feedback input to the PWM comparator; an external resistive divider from the output to GND sets VOUT, with VFB of 0.98V to 1.02V (1V typical).
3 FREQ input Switching frequency setting pin; a resistor to GND sets fSW (for example 102kΩ gives 500kHz), and an external SYNC clock applied here makes the converter follow it (high level above 1.5V, low level below 1V, 100kHz to 1MHz recommended).
4 EN input Enable input that turns the regulator on above 1.6V (rising) and off below 1.3V (falling); it has no internal pull-up or pull-down so it must not be left floating, and sink current into EN must be kept below 150µA.
5 BST power_out Bootstrap supply for the internal floating high-side MOSFET driver; connect a 0.1µF capacitor between this pin and SW.
6 VIN power_in Input supply pin, 4.5V to 55V, powering the internal control circuitry and VDD regulator; place a decoupling capacitor to GND close to this pin.
7 VIN power_in Input supply pin, 4.5V to 55V, powering the internal control circuitry and VDD regulator; place a decoupling capacitor to GND close to this pin.
8 VIN power_in Input supply pin, 4.5V to 55V, powering the internal control circuitry and VDD regulator; place a decoupling capacitor to GND close to this pin.
9 NC unconnected Not connected; float this pin in the application.
10 SW output Switch node, the output from the internal high-side MOSFET source to the inductor; the datasheet limits VSW to -0.5V to (VIN + 0.5V) as an absolute maximum.
11 SW output Switch node, the output from the internal high-side MOSFET source to the inductor; the datasheet limits VSW to -0.5V to (VIN + 0.5V) as an absolute maximum.
12 NC unconnected Not connected; float this pin in the application.
13 GND power_in Power ground for the internal power MOSFETs; connect to a large ground plane.
14 GND power_in Power ground for the internal power MOSFETs; connect to a large ground plane.
15 GND power_in Power ground for the internal power MOSFETs; connect to a large ground plane.
16 VDD power_out Output of the VDD regulator that powers the internal MOSFET driver and BST charging, regulated at 3.6V (BIAS floating) or 4.8V (BIAS at or above 5.4V); a 1µF decoupling capacitor is needed close to the pin.
17 BIAS input Optional external supply input, recommended 3.3V to 5.5V, that powers the internal circuits for better efficiency; float or connect to GND if not used.
18 PG output Power-good open-drain output that must be pulled up through a resistor to an external source; it is released high after FB reaches 90% of REF and pulled low when FB falls to 85% of REF.
19 SS passive Optional soft-start pin; a capacitor to GND sets the soft-start time, and leaving the pin floating activates the internal 0.5ms soft start.
20 AGND power_in Ground for the internal logic and signal circuits.

Key specifications

Parameter Value
Manufacturer Monolithic Power Systems
Package TSSOP-20
Category Power Management (PMIC)
Pins 20

CAD (KiCad official)

  • Symbol: MPQ4570GF-Z
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: mpq4570gf-z-etched.step / mpq4570gf-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mpq4570gf-z.step / mpq4570gf-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Monolithic Power Systems datasheet (22 pp, sha256 369a892b51791906, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF