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MPQ2908AGL-Z

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Monolithic Power Systems DC-DC Converters, QFN-20(3x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MPQ2908AGL-Z

Monolithic Power Systems · DC-DC Converters · QFN-20(3x4)

MPQ2908AGL-Z from Monolithic Power Systems, in a QFN-20(3x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC2 power_in External supply input for the internal VCC1 regulator; VCC2 above 4.7V disables the VIN-powered regulator and no supply greater than 12V may be connected.
2 VCC1 power_out Internal bias supply that requires a ≥1µF decoupling capacitor between VCC1 and PGND.
3 SGND power_in Low-noise ground reference that should be connected to the VOUT side of the output capacitors.
4 SS passive Soft-start control input; an external capacitor from SS to SGND sets the soft-start period, charged by a 4µA internal source.
5 COMP passive Regulation loop compensation pin, where an R-C network is connected from COMP to SGND.
6 FB input Feedback input to the error amplifier, compared against the internal 0.8V reference to set the output voltage.
7 CCM/AAM input Floating or tying to VCC1 selects CCM operation, while a resistor to SGND giving at least 480mV selects AAM mode.
8 FREQ passive A resistor from FREQ to SGND sets the switching frequency, programmable from 100kHz to 1000kHz.
9 PG output Open-drain power good output that is pulled low when the output is outside ±10% of nominal and should connect through a resistor (e.g. 100kΩ) to a source no more than 5V.
10 ILIM input Sets the fixed current-sense limit: 25mV when tied to SGND, 50mV when tied to VCC1, and 75mV when floating.
11 SYNCO output Frequency synchronous output that provides a 180° out-of-phase clock when the part operates in CCM for dual-channel operation.
12 SENSE- input Negative current-sense input with SENSE+/- rated to 28V and the differential SENSE+ to SENSE- voltage limited to -0.7V to +0.7V.
13 SENSE+ input Positive current-sense input with SENSE+/- rated to 28V and the differential SENSE+ to SENSE- voltage limited to -0.7V to +0.7V.
14 PGND power_in High-current ground reference for the internal low-side driver and VCC1 regulator, connected directly to the negative terminal of the VCC1 decoupling capacitor.
15 BG output Bottom gate driver output that drives the synchronous N-channel MOSFET gate, limited to -0.3V to VCC1 + 0.3V.
16 SW passive Switch node that is the reference for the VBST supply and the high-current return for the bootstrapped switch, rated -0.3V to 65V.
17 TG output Top gate drive output that floats on SW to drive the top N-channel MOSFET gate, limited to VSW - 0.3V to VBST + 0.3V.
18 BST power_in Positive supply for the floating high-side driver, limited to VIN + 6.5V, with BST - SW limited to 6.5V and an external diode to BST required to charge the bootstrap capacitor.
19 IN power_in Input supply for the 4V to 60V operating range (65V absolute maximum), requiring a ceramic capacitor to prevent large input voltage spikes.
20 EN/SYNC input Enable input with a 1.22V rising threshold and 130mV hysteresis that also accepts an external sync clock from 100kHz to 1000kHz, rated to 55V.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Monolithic Power Systems
Package QFN-20(3x4)
Category Power Management (PMIC)
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input supply voltage VIN 65 V 3
SW -0.3 65 V 3
EN/SYNC 55 V 3
BST - SW 6.5 V 3
Supply voltage (VCC1) VCC1 6.5 V 3
External supply voltage (VCC2) VCC2 15 V 3
SENSE+ / - 28 V 3
Differential sense (SENSE+ to SENSE-) -0.7 0.7 V 3
BG -0.3 V upper limit VCC1 + 0.3V 3
All other pins -0.3 6.5 V 3
Storage temperature -65 175 °C 3
Supply voltage (VIN) VIN 4 60 V 3
Output voltage (VOUT) VOUT 25 V 3
Supply voltage for (VCC2) VCC2 4.7 12 V 3
Operating junction temp. TJ -40 125 °C 3
Thermal resistance junction-to-ambient, QFN-20 (3mmx4mm) θJA 48 °C/W JESD51-7, 4-layer PCB 3
Thermal resistance junction-to-case, QFN-20 (3mmx4mm) θJC 10 °C/W JESD51-7, 4-layer PCB 3
VIN UVLO threshold (rising) INUV_RISING 4 4.5 5 V 4
VIN UVLO threshold (falling) INUV_FALLING 3.2 3.7 3.95 V 4
VIN supply current with VCC2 bias IQ_VCC2 25 40 μA VCC2 = 12V, external bias, VAAM = 5V, VFB = 0.84V, SENSE+ = SENSE- = 0V, no switching 4
VIN supply current without VCC2 bias IQ 750 1000 μA VCC2 = 0V, VFB = 0.84V, VAAM = 5V, SENSE+ = SENSE- = 0V, no switching 4
VIN AAM current IQ_AAM 250 350 μA VCC2 = 0V, VAAM = 0.6V, VFB = 0.84V, SENSE+ = SENSE- = 12V, no switching 4
VIN shutdown current ISHDN 0.5 5 μA VEN = 0V 4
VCC1 regulator output voltage from VIN VCC1_VIN 4.5 5 5.5 V VIN > 6V, load = 0 to 50mA 4
VCC1 regulator load regulation from VIN 1 3 % Load = 0 to 50mA, VCC2 floating or connected to SGND 4
VCC1 regulator load regulation from VCC2 1 3 % Load = 0 to 50mA, VCC2 = 12V 4
VCC2 UVLO threshold (rising) VCC2_RISING 4.3 4.7 4.92 V 4
VCC2 UVLO threshold (falling) VCC2_FALLING 4.05 4.45 4.75 V 4
VCC2 supply current IVCC2 800 1100 μA VAAM = 5V, VFB = 0.84V, SENSE+ = SENSE- = 12V, VCC2 = 12V, no switching 4
VCC2 supply current IVCC2 200 300 μA VAAM = 0.6V, VFB = 0.84V, SENSE+ = SENSE- = 12V, VCC2 = 12V, no switching 4
Feedback voltage VFB 0.788 0.8 0.812 V 4V ≤ VIN ≤ 60V 4
Enable threshold (rising) VEN_RISING 1.16 1.22 1.28 V 4
Enable threshold (falling) VEN_FALLING 1.03 1.09 1.15 V 4
Enable input current IEN 2 5 μA VEN = 2V 4
Enable turn-off delay tOFF 10 20 40 μs 4
Operating frequency FSW 340 430 520 kHz RFREQ = 45.3kΩ 5
Maximum programmable frequency FSWH 1000 kHz 5
Minimum programmable frequency FSWL 100 kHz 5
EN/SYNC frequency range FSYNC 100 1000 kHz 5
Current sense common mode voltage range VSENSE+/- 0 25 V 5
Current limit sense voltage VILIMIT 15 25 35 mV ILIM = SGND, VSENSE+ = 3.3V 5
Current limit sense voltage VILIMIT 40 50 60 mV ILIM = VCC1, VSENSE+ = 3.3V 5
Current limit sense voltage VILIMIT 65 75 85 mV ILIM = FLOAT, VSENSE+ = 3.3V 5
Input current of sensor ISENSE -70 -45 -20 μA VSENSE+/-(CM) = 0V 5
Input current of sensor ISENSE 80 115 160 μA VSENSE+/-(CM) = 3.3V 5
Input current of sensor ISENSE 105 150 205 μA VSENSE+/-(CM) > 5V 5
Soft-start source current ISS 2 4 6 μA SS = 0.5V 5
Error amp sink/source current IEA -30 30 μA FB = 0.7/0.9V 5
Over-voltage threshold VOV 110 115 120 % VFB 5
TG maximum duty cycle Dmax 98 99.5 % VFB = 0.7V 6
BG minimum on time tON_MIN_BG 175 250 ns 6
Power good low VPG_Low 0.1 0.3 V Iload = 4mA 6
PG rising threshold PGVth_RSING 85 90 96.5 % VFB VOUT rising 6
PG rising threshold PGVth_RSING 101 107 112.5 % VFB VOUT falling 6
PG falling threshold PGVth_FALLING 81 87 92.5 % VFB VOUT falling 6
PG falling threshold PGVth_FALLING 105 110 116.5 % VFB VOUT rising 6

CAD (KiCad official)

  • Symbol: MPQ2908AGL-Z
  • Footprint: Package_DFN_QFN:QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm
  • 3D model: QFN-20(3x4) (KiCad packages3D, STEP)
  • 3D model files: mpq2908agl-z-etched.step / mpq2908agl-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mpq2908agl-z.step / mpq2908agl-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Monolithic Power Systems datasheet (34 pp, sha256 35bc526adade273e, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF