component
MPQ2143DJ-AEC1-LF-Z
Public Made by Adomby adom
Monolithic Power Systems DC-DC Converters, TSOT-23-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MPQ2143DJ-AEC1-LF-Z
Monolithic Power Systems · DC-DC Converters · TSOT-23-8
MPQ2143DJ-AEC1-LF-Z from Monolithic Power Systems, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PG | output | Open-drain power-good indicator with an internal 500kΩ pull-up to VIN; it is pulled up when FB is within ±10% of the regulation level and is LOW when FB is outside that window. |
| 2 | VIN | power_in | Supply voltage input for the 2.5V to 5.5V unregulated input; C1 prevents large voltage spikes from appearing at the input. |
| 3 | SW | output | Switch output node of the internal power stage; the absolute maximum rating is -3V for less than 5ns to VIN+0.3V. |
| 4 | PGND | power_in | Power ground for the power stage. |
| 5 | OUT | input | Input sense pin used for output voltage feedback. |
| 6 | AGND | power_in | Analog ground that serves as the reference for the internal control circuit. |
| 7 | FB | input | Feedback pin; connect an external resistor divider from the output to GND to set the output voltage, which can be regulated as low as 0.6V. |
| 8 | EN | input | On/off control; the device is enabled when EN is pulled above 1.2V and is disabled when EN is left floating or grounded (internal 1MΩ resistor to ground). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | TSOT-23-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | 6 | V | 2 | |||
| VSW Pin Voltage | VSW | -3 | V | min applies for < 5ns; max printed as VIN+0.3V (not numeric) | 2 | ||
| All Other Pins Voltage | -0.3 | 6 | V | 2 | |||
| Junction Temperature | 150 | °C | 2 | ||||
| Continuous Power Dissipation | 1.25 | W | TA = 25°C | 2 | |||
| Storage Temperature | -65 | 150 | °C | 2 | |||
| Supply Voltage | VIN | 2.5 | 5.5 | V | 2 | ||
| Output Voltage | VOUT | 0.6 | V | max printed as VIN -0.5V (not numeric) | 2 | ||
| Operating Junction Temperature | TJ | -40 | 125 | °C | 2 | ||
| Feedback Voltage tolerance | VFB | -1.5 | 1.5 | % | 2.5V ≤ VIN ≤ 5.5V | 3 | |
| Feedback Voltage tolerance | VFB | -2 | 2 | % | TJ=-40°C to +125°C | 3 | |
| Under-Voltage Lockout Threshold (rising) | 2 | 2.2 | 2.4 | V | Rising | 3 | |
| Switching frequency tolerance | fs | -20 | 20 | % | VIN=5V, VOUT=1.2V, IOUT=1A | 3 | |
| Switching frequency tolerance | fs | -25 | 25 | % | TJ=-40°C to +125°C | 3 | |
| Power-Good Upper Trip Threshold | PGH | 10 | % | FB voltage respect to the regulation | 3 | ||
| Power-Good Lower Trip Threshold | PGL | -10 | % | FB voltage respect to the regulation | 3 | ||
| Switch Leakage | 0.1 | 2 | μA | VEN = 0V, VIN = 5V, TJ=+25°C | 3 | ||
| PFET Current Limit | 4.2 | 4.8 | A | TJ=+25°C | 3 | ||
| Feedback Voltage | VFB | 0.6 | V | 2.5V ≤ VIN ≤ 5.5V | 3 | ||
| Feedback Current | IFB | 10 | nA | VFB = 0.63V | 3 | ||
| PFET Switch ON Resistance | RDSON_P | 65 | mΩ | 3 | |||
| NFET Switch ON Resistance | RDSON_N | 40 | mΩ | 3 | |||
| Switch Leakage | 35 | μA | VEN = 0V, VIN = 5V, TJ=-40°C to +125°C | 3 | |||
| PFET Current Limit | 4 | A | TJ=-40°C to +125°C | 3 | |||
| NFET Switch Sinking Current | INSW | 100 | μA | VOUT=1.2V, VFB=0.7V | 3 | ||
| ON Time | tON | 200 | nS | VIN=5V, VOUT=1.2V | 3 | ||
| ON Time | tON | 277 | nS | VIN=3.6V, VOUT=1.2V | 3 | ||
| Switching frequency | fs | 1200 | kHz | VIN=5V, VOUT=1.2V, IOUT=1A | 3 | ||
| Minimum OFF Time | tMIN-OFF | 50 | ns | 3 | |||
| Soft-Start Time | tSS-ON | 1.3 | ms | 3 | |||
| Soft-Stop Time | tSS-OFF | 1 | ms | 3 | |||
| Power-Good Delay | PGD | 110 | μs | 3 | |||
| Power-Good Sink Current Capability (VPG-L) | VPG-L | 0.4 | V | Sink 1mA | 3 | ||
| Power-Good Logic High Voltage | VPG-H | 4.9 | V | VIN=5V, VFB=0.6V, TJ=+25°C | 3 | ||
| Power-Good Logic High Voltage | VPG-H | 4.85 | V | VIN=5V, VFB=0.6V, TJ=-40°C to +125°C | 3 | ||
| Power-Good Internal Pull-Up Resistor | RPG | 500 | kΩ | 3 | |||
| Under-Voltage Lockout Threshold Hysteresis | 150 | mV | 3 | ||||
| EN Input Logic Low Voltage | 0.4 | V | 3 | ||||
| EN Input Logic High Voltage | 1.2 | V | 3 | ||||
| EN Input Current | 2 | μA | VEN=2V | 4 | |||
| EN Input Current | 0.1 | μA | VEN=0V | 4 | |||
| Supply Current (Shutdown) | 0.1 | μA | VEN=0V | 4 | |||
| Supply Current (Quiescent) | 40 | μA | VEN=2V, VFB=0.63V, VIN=3.6V | 4 | |||
| Thermal Shutdown | 150 | °C | 4 | ||||
| Thermal Hysteresis | 30 | °C | 4 | ||||
| Thermal Resistance junction-to-ambient | θJA | 100 | °C/W | TSOT23-8, measured on JESD51-7 4-layer PCB | 2 | ||
| Thermal Resistance junction-to-case | θJC | 55 | °C/W | TSOT23-8 | 2 |
CAD (KiCad official)
- Symbol:
MPQ2143DJ-AEC1-LF-Z - Footprint:
Package_TO_SOT_SMD:TSOT-23-8 - 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files:
mpq2143dj-aec1-lf-z-etched.step/mpq2143dj-aec1-lf-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mpq2143dj-aec1-lf-z.step/mpq2143dj-aec1-lf-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (16 pp, sha256
4cb4951458037ab4, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MPQ2143DJ-AEC1-LF-Z
**Monolithic Power Systems** · DC-DC Converters · TSOT-23-8
MPQ2143DJ-AEC1-LF-Z from Monolithic Power Systems, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PG | output | Open-drain power-good indicator with an internal 500kΩ pull-up to VIN; it is pulled up when FB is within ±10% of the regulation level and is LOW when FB is outside that window. |
| 2 | VIN | power_in | Supply voltage input for the 2.5V to 5.5V unregulated input; C1 prevents large voltage spikes from appearing at the input. |
| 3 | SW | output | Switch output node of the internal power stage; the absolute maximum rating is -3V for less than 5ns to VIN+0.3V. |
| 4 | PGND | power_in | Power ground for the power stage. |
| 5 | OUT | input | Input sense pin used for output voltage feedback. |
| 6 | AGND | power_in | Analog ground that serves as the reference for the internal control circuit. |
| 7 | FB | input | Feedback pin; connect an external resistor divider from the output to GND to set the output voltage, which can be regulated as low as 0.6V. |
| 8 | EN | input | On/off control; the device is enabled when EN is pulled above 1.2V and is disabled when EN is left floating or grounded (internal 1MΩ resistor to ground). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | TSOT-23-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | | | 6 | V | | 2 |
| VSW Pin Voltage | VSW | -3 | | | V | min applies for < 5ns; max printed as VIN+0.3V (not numeric) | 2 |
| All Other Pins Voltage | | -0.3 | | 6 | V | | 2 |
| Junction Temperature | | | | 150 | °C | | 2 |
| Continuous Power Dissipation | | | | 1.25 | W | TA = 25°C | 2 |
| Storage Temperature | | -65 | | 150 | °C | | 2 |
| Supply Voltage | VIN | 2.5 | | 5.5 | V | | 2 |
| Output Voltage | VOUT | 0.6 | | | V | max printed as VIN -0.5V (not numeric) | 2 |
| Operating Junction Temperature | TJ | -40 | | 125 | °C | | 2 |
| Feedback Voltage tolerance | VFB | -1.5 | | 1.5 | % | 2.5V ≤ VIN ≤ 5.5V | 3 |
| Feedback Voltage tolerance | VFB | -2 | | 2 | % | TJ=-40°C to +125°C | 3 |
| Under-Voltage Lockout Threshold (rising) | | 2 | 2.2 | 2.4 | V | Rising | 3 |
| Switching frequency tolerance | fs | -20 | | 20 | % | VIN=5V, VOUT=1.2V, IOUT=1A | 3 |
| Switching frequency tolerance | fs | -25 | | 25 | % | TJ=-40°C to +125°C | 3 |
| Power-Good Upper Trip Threshold | PGH | | | 10 | % | FB voltage respect to the regulation | 3 |
| Power-Good Lower Trip Threshold | PGL | -10 | | | % | FB voltage respect to the regulation | 3 |
| Switch Leakage | | | 0.1 | 2 | μA | VEN = 0V, VIN = 5V, TJ=+25°C | 3 |
| PFET Current Limit | | 4.2 | | 4.8 | A | TJ=+25°C | 3 |
| Feedback Voltage | VFB | | 0.6 | | V | 2.5V ≤ VIN ≤ 5.5V | 3 |
| Feedback Current | IFB | | 10 | | nA | VFB = 0.63V | 3 |
| PFET Switch ON Resistance | RDSON_P | | 65 | | mΩ | | 3 |
| NFET Switch ON Resistance | RDSON_N | | 40 | | mΩ | | 3 |
| Switch Leakage | | | 35 | | μA | VEN = 0V, VIN = 5V, TJ=-40°C to +125°C | 3 |
| PFET Current Limit | | | 4 | | A | TJ=-40°C to +125°C | 3 |
| NFET Switch Sinking Current | INSW | | 100 | | μA | VOUT=1.2V, VFB=0.7V | 3 |
| ON Time | tON | | 200 | | nS | VIN=5V, VOUT=1.2V | 3 |
| ON Time | tON | | 277 | | nS | VIN=3.6V, VOUT=1.2V | 3 |
| Switching frequency | fs | | 1200 | | kHz | VIN=5V, VOUT=1.2V, IOUT=1A | 3 |
| Minimum OFF Time | tMIN-OFF | | 50 | | ns | | 3 |
| Soft-Start Time | tSS-ON | | 1.3 | | ms | | 3 |
| Soft-Stop Time | tSS-OFF | | 1 | | ms | | 3 |
| Power-Good Delay | PGD | | 110 | | μs | | 3 |
| Power-Good Sink Current Capability (VPG-L) | VPG-L | | 0.4 | | V | Sink 1mA | 3 |
| Power-Good Logic High Voltage | VPG-H | | 4.9 | | V | VIN=5V, VFB=0.6V, TJ=+25°C | 3 |
| Power-Good Logic High Voltage | VPG-H | | 4.85 | | V | VIN=5V, VFB=0.6V, TJ=-40°C to +125°C | 3 |
| Power-Good Internal Pull-Up Resistor | RPG | | 500 | | kΩ | | 3 |
| Under-Voltage Lockout Threshold Hysteresis | | | 150 | | mV | | 3 |
| EN Input Logic Low Voltage | | | 0.4 | | V | | 3 |
| EN Input Logic High Voltage | | | 1.2 | | V | | 3 |
| EN Input Current | | | 2 | | μA | VEN=2V | 4 |
| EN Input Current | | | 0.1 | | μA | VEN=0V | 4 |
| Supply Current (Shutdown) | | | 0.1 | | μA | VEN=0V | 4 |
| Supply Current (Quiescent) | | | 40 | | μA | VEN=2V, VFB=0.63V, VIN=3.6V | 4 |
| Thermal Shutdown | | | 150 | | °C | | 4 |
| Thermal Hysteresis | | | 30 | | °C | | 4 |
| Thermal Resistance junction-to-ambient | θJA | | 100 | | °C/W | TSOT23-8, measured on JESD51-7 4-layer PCB | 2 |
| Thermal Resistance junction-to-case | θJC | | 55 | | °C/W | TSOT23-8 | 2 |
## CAD (KiCad official)
- Symbol: `MPQ2143DJ-AEC1-LF-Z`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-8`
- 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files: `mpq2143dj-aec1-lf-z-etched.step` / `mpq2143dj-aec1-lf-z-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mpq2143dj-aec1-lf-z.step` / `mpq2143dj-aec1-lf-z.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Monolithic Power Systems datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603396010253438976) (16 pp, sha256 `4cb4951458037ab4`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mpq2143dj-aec1-lf-z-datasheet.pdf)