# MPQ2019GN-AEC1-Z

**Monolithic Power Systems** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8-EP

MPQ2019GN-AEC1-Z from Monolithic Power Systems, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output voltage; only a low-value ceramic capacitor (≥ 0.47μF) on the output is required for stability. |
| 2 | NC | unconnected | No connection. |
| 3 | GND | power_in | Ground; connect the exposed pad and GND to the same ground plane. |
| 4 | IN | power_in | Input voltage; connect a 3V to 40V supply to IN. |
| 5 | EN | input | Regulator on/off control input; logic low shuts down the IC and logic high starts it up, and EN should be connected to IN for automatic start-up. |
| 6 | PG | output | Power good open-drain output; if not used, the pin can be left floating. |
| 7 | PGDL | passive | Programmable power-good delay time pin set by a capacitor on PGDL; if not used, the pin can be left floating. |
| 8 | FB | input | Feedback input for the output-adjustable version, regulated to 1.25V nominally and used to set the output voltage. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| IN, EN voltage |  | -0.3 |  | 42 | V |  | 3 |
| OUT voltage |  | -0.3 |  | 17 | V |  | 3 |
| PG voltage |  | -0.3 |  | 15 | V |  | 3 |
| PGDL, FB voltage |  | -0.3 |  | 6 | V |  | 3 |
| Junction temperature |  |  |  | 150 | °C |  | 3 |
| Lead temperature |  |  |  | 260 | °C |  | 3 |
| Storage temperature |  | -65 |  | 150 | °C |  | 3 |
| ESD HBM (Human Body Model) |  |  |  | 4 | kV |  | 3 |
| ESD MM (Machine Model) |  |  |  | 200 | V |  | 3 |
| Supply voltage | VIN | 3 |  | 40 | V |  | 3 |
| Output voltage | VOUT | 1.25 |  | 15 | V |  | 3 |
| Operating temperature | TA | -40 |  | 125 | °C | TA≤TJ≤+150°C | 3 |
| Input voltage | VIN | 3 |  | 40 | V |  | 4 |
| Output-voltage range | VOUT | 1.25 |  | 15 | V |  | 4 |
| GND current | IGND |  | 10 | 15 | µA | 0<ILOAD<1mA | 4 |
| GND current | IGND |  | 15 | 21 | µA | 1mA<ILOAD<30mA | 4 |
| GND current | IGND |  | 65 | 95 | µA | 30mA<ILOAD<300mA | 4 |
| Shutdown supply current | IS |  |  | 1 | µA | VEN = 0V | 4 |
| Load-current limit | ILIMIT | 600 | 1000 | 1350 | mA | VIN=7V, VOUT = 0V, TA = +25°C | 4 |
| FB voltage | VFB | 1.225 | 1.25 | 1.275 | V | FB = OUT, ILOAD=5mA | 4 |
| Dropout voltage | VDROPOUT |  | 200 | 400 | mV | VOUT=5V, ILOAD = 150mA | 4 |
| Dropout voltage | VDROPOUT |  | 420 | 550 | mV | TA = +25°C, VOUT=5V, ILOAD = 300mA | 4 |
| FB input current | IFB |  |  | 50 | nA | VFB = 1.3V | 4 |
| Line regulation |  | -10 | 1 | 10 | mV | VIN = 3V to 40V, ILOAD = 5mA, VOUT = VFB | 4 |
| Load regulation |  |  | 1 | 15 | mV | ILOAD = 5mA to 300mA, VOUT = 5V, TA = +25°C | 5 |
| Output voltage PSRR 100Hz | PSRR |  | 57 |  | dB | 100Hz, COUT = 10μF, ILOAD=10mA | 5 |
| Output voltage PSRR 1kHz | PSRR |  | 45 |  | dB | 1kHz, COUT = 10μF, ILOAD=10mA | 5 |
| Output voltage PSRR 100kHz | PSRR |  | 51 |  | dB | 100kHz, COUT = 10μF, ILOAD=10mA | 5 |
| Start-up response time |  |  | 0.9 | 1.5 | ms | RLOAD=500Ω, VOUT = 5V, COUT=22µF, VOUT from 10% to 90% | 5 |
| EN threshold voltage low | VIL |  |  | 0.3 | V |  | 5 |
| EN threshold voltage high | VIH | 1.8 |  |  | V |  | 5 |
| EN input current |  |  | 0.1 | 0.5 | µA | EN = 0V or 15V | 5 |
| PG rising threshold |  | 89 | 93 | 97 | %VFB |  | 5 |
| PG rising threshold hysteresis |  |  | 5 |  | %VFB |  | 5 |
| PG low voltage |  |  | 0.1 | 0.4 | V | Sink 1mA Current | 5 |
| PG leakage current |  |  |  | 1 | µA | VPG=5V | 5 |
| PGDL charging current |  | 3 | 5.5 | 9 | µA | VPGDL=1V | 5 |
| PGDL rising threshold |  | 1.4 | 1.7 | 2 | V |  | 5 |
| PGDL falling threshold |  | 0.2 | 0.4 | 0.7 | V |  | 5 |
| PG delay time |  | 5 | 10 | 15 | ms | CPGDL=47nF | 5 |
| PG reaction time |  |  | 0.5 | 2 | µs | CPGDL=47nF | 5 |
| Thermal shutdown | TSD |  | 165 |  | °C | Derived from bench characterization, not tested in production | 5 |
| Thermal shutdown hysteresis | ΔTSD |  | 30 |  | °C | Derived from bench characterization, not tested in production | 5 |
| Thermal resistance junction-to-ambient SOIC-8 EP | θJA |  | 50 |  | °C/W | Measured on JESD51-7, 4-layer PCB | 3 |
| Thermal resistance junction-to-case SOIC-8 EP | θJC |  | 10 |  | °C/W | Measured on JESD51-7, 4-layer PCB | 3 |

## CAD (KiCad official)

- Symbol: `MPQ2019GN-AEC1-Z`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files: `mpq2019gn-aec1-z-etched.step` / `mpq2019gn-aec1-z-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mpq2019gn-aec1-z.step` / `mpq2019gn-aec1-z.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Monolithic Power Systems datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893262296338432) (16 pp, sha256 `96102fb10ea8b105`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mpq2019gn-aec1-z-datasheet.pdf)