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Contents

README

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MP9942AGJ-Z

Monolithic Power Systems · DC-DC Converters · TSOT-23-8

MP9942AGJ-Z from Monolithic Power Systems, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PG output Power Good open-drain output that goes high when the output voltage exceeds 90% of the nominal voltage and should be pulled up through a resistor (e.g. 100kΩ) to VCC or another voltage source.
2 IN power_in Supply voltage input for a 4V to 30V input rail, decoupled with C1 and connected with a wide PCB trace.
3 SW output Switch output node that must be connected with a wide PCB trace; the absolute maximum VSW rating is -0.3V to 41V.
4 GND power_in System ground and reference for the regulated output voltage, to be connected to GND with copper traces and vias.
5 BST passive Bootstrap pin that requires a capacitor between SW and BST to form the floating high-side driver supply, with a 20Ω resistor in series strongly recommended to reduce SW spike voltage.
6 EN/SYNC input Enable/synchronize input where high enables the regulator and an external clock of 200kHz to 2.2MHz applied here changes the switching frequency.
7 VCC power_out Internal bias supply output that must be decoupled with a 0.1μF to 0.22μF capacitor, not exceeding 0.22μF.
8 FB input Feedback input connected to the tap of the external output resistor divider; the frequency fold-back comparator lowers the oscillator frequency when FB is below 660mV.

Key specifications

Parameter Value
Manufacturer Monolithic Power Systems
Package TSOT-23-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage (VIN) absolute maximum VIN -0.3 40 V 3
Switch voltage (VSW) absolute maximum VSW -0.3 41 V 3
All other pins absolute maximum -0.3 6 V All other pins; see note 2 for EN pin 3
Continuous power dissipation TSOT23-8 1.25 W TA = +25°C 3
Junction temperature absolute maximum 150 °C 3
Lead temperature absolute maximum 260 °C 3
Storage temperature -65 150 °C 3
Continuous supply voltage VIN VIN 4 30 V 3
Output voltage VOUT VOUT 0.8 V Upper limit printed as VIN*DMAX (not numeric) 3
Operating junction temperature TJ -40 125 °C 3
Supply current (shutdown) ISHDN 8 μA VEN = 0V 4
Supply current (quiescent) IQ 0.5 0.7 mA VEN = 2V, VFB = 1V 4
HS switch-ON resistance RON_HS 90 155 mΩ VBST-SW=5V 4
LS switch-ON resistance RON_LS 55 105 mΩ VCC =5V 4
Switch leakage ILKG_SW 1 μA VEN = 0V, VSW =12V 4
Current limit ILIMIT 3.5 5 7 A Under 40% Duty Cycle 4
Oscillator frequency fSW 320 410 500 kHz VFB=750mV 4
Fold-back frequency fFB 70 100 130 kHz VFB<400mV 4
Maximum duty cycle DMAX 92 95 % VFB=750mV, 410kHz 4
Minimum ON time tON_MIN 70 ns 4
Sync frequency range fSYNC 0.2 2.4 MHz 4
Feedback voltage VFB 780 792 804 mV 4
Feedback current IFB 10 100 nA VFB=820mV 4
EN rising threshold VEN_RISING 1.15 1.4 1.65 V 4
EN falling threshold VEN_FALLING 1.05 1.25 1.45 V 4
EN input current IEN 4 6 μA VEN=2V 4
EN input current IEN 0 0.2 μA VEN=0 4
VIN UVLO threshold rising INUVRISING 3.3 3.5 3.7 V 4
VIN UVLO threshold falling INUVFALLING 3.1 3.3 3.5 V 4
VCC regulator VCC 4.6 4.9 5.2 V ICC=0mA 4
VCC load regulation 1.5 4 % ICC=5mA 4
Soft-start period tSS 0.55 1.45 2.45 ms VOUT from 10% to 90% 4
Thermal shutdown TSD 150 170 °C 4
PG rising threshold PGVth_RISING 86.5 90 93.5 % as percentage of VFB 4
PG falling threshold PGVth FALLING 80.5 84 87.5 % as percentage of VFB 4
PG rising delay PGTd_RISING 40 90 160 μs 5
PG falling delay PGTd_FALLING 30 55 95 μs 5
PG sink current capability VPG Sink 0.1 0.3 V 4mA 5
PG leakage current ILKG_PG 10 100 nA 5
VIN UVLO threshold hysteresis INUVHYS 200 mV 4
EN threshold hysteresis VEN_HYS 150 mV 4
Thermal hysteresis TSD_HYS 30 °C 4
PG threshold hysteresis PGVth_HYS 6 % as percentage of VFB 5
Thermal resistance junction-to-ambient θJA 100 °C/W Measured on JESD51-7, 4-layer PCB 3
Thermal resistance junction-to-case θJC 55 °C/W Measured on JESD51-7, 4-layer PCB 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper 4 GND System Ground. This pin is the reference ground of the regulated output voltage, and PCB layout requires special care. For best results, connect to GND with copper traces and vias. 6

CAD (KiCad official)

  • Symbol: MP9942AGJ-Z
  • Footprint: Package_TO_SOT_SMD:TSOT-23-8
  • 3D model: TSOT-23-8 (KiCad packages3D, STEP)
  • 3D model files: mp9942agj-z-etched.step / mp9942agj-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mp9942agj-z.step / mp9942agj-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Monolithic Power Systems datasheet (21 pp, sha256 4966796d66d7efc3, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF