# MP8859GQ-0000-Z

**MPS** · Others · QFN-16(3x3)

MP8859GQ-0000-Z from MPS, in a QFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | IN is the supply input for the chip and operates from 2.8V to 22V, with a capacitor CIN placed as close to the IC as possible to limit voltage spikes. |
| 2 | GND | power_in | GND is the power ground and reference for the regulated output voltage, and requires copper traces and vias with extra care in PCB layout. |
| 3 | EN | input | EN is the on/off control for the entire chip, driven high to turn the chip on and low or floating to turn it off, with an internal 2MΩ pull-down to ground. |
| 4 | ADD | input | ADD is the I2C slave address programming pin, set by a resistor divider from VCC to select one of four I2C slave addresses. |
| 5 | SCL | input | SCL is the I2C clock pin and supports an I2C clock up to 3.4MHz. |
| 6 | SDA | bidirectional | SDA is the data pin of the I2C interface. |
| 7 | OC | passive | OC is the output constant-current limit set pin, configured by an external resistor. |
| 8 | ALT | output | ALT is the alert output that is pulled to logic low to indicate a fault or warning has occurred. |
| 9 | VCC | power_out | VCC is the internal 3.6V LDO regulator output and must be decoupled with a 1µF capacitor. |
| 10 | AGND | power_in | AGND is the analog ground and must be connected to GND. |
| 11 | GND | power_in | GND is the power ground and reference for the regulated output voltage, and requires copper traces and vias with extra care in PCB layout. |
| 12 | OUT | power_out | OUT is the output power pin, with the output capacitor placed close to OUT and GND. |
| 13 | BST2 | passive | BST2 is the bootstrap pin, connected through a 0.1µF capacitor to SW2 to form a floating supply for the high-side switch driver. |
| 14 | SW2 | passive | SW2 is the switching node of the second half bridge, with one end of the inductor connected to SW2. |
| 15 | SW1 | passive | SW1 is the switching node of the first half bridge, with one end of the inductor connected to SW1. |
| 16 | BST1 | passive | BST1 is the bootstrap pin, connected through a 0.1µF capacitor to SW1 to form a floating supply for the high-side switch driver. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | MPS |
| Package | QFN-16(3x3) |
| Category | Others |
| Pins | 17 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper |  | close to the IC's VIN-to-GND and OUT-to￾GND pins, respectively. 2. Use a large copper plane for PGND. | 30 |

## CAD (KiCad official)

- Symbol: `MP8859GQ-0000-Z`
- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`
- 3D model: QFN-16(3x3) (KiCad packages3D, STEP)
- 3D model files: `mp8859gq-0000-z-etched.step` / `mp8859gq-0000-z-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mp8859gq-0000-z.step` / `mp8859gq-0000-z.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [MPS datasheet](docs/mp8859gq-0000-z-datasheet.pdf) (32 pp, sha256 `a88e314c593a29c2`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `off` (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mp8859gq-0000-z-datasheet.pdf)