# MP8720GQ-Z

**Monolithic Power Systems** · DC-DC Converters · QFN-16(3x3)

MP8720GQ-Z from Monolithic Power Systems, in a QFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage input for the internal MOSFET and regulator, operating from +4.5V to +26V, which requires an input decoupling capacitor and wide traces with multiple vias. |
| 2 | PGND | power_in | Power ground that should be connected with wide PCB traces and multiple vias. |
| 3 | 3V3 | power_in | External 3.3V VCC input for control and driver, with a recommended operating range of 3.15V to 3.5V and a 1µF decoupling capacitor placed close to 3V3 and PGND (an R-C filter is recommended). |
| 4 | PGND | power_in | Power ground that should be connected with wide PCB traces and multiple vias. |
| 5 | PGND | power_in | Power ground that should be connected with wide PCB traces and multiple vias. |
| 6 | PGND | power_in | Power ground that should be connected with wide PCB traces and multiple vias. |
| 7 | PGND | power_in | Power ground that should be connected with wide PCB traces and multiple vias. |
| 8 | NC | unconnected | No connection; this pin can be tied to VIN, SW, or GND for easier layout. |
| 9 | SW | output | Switch output connected to the inductor and bootstrap capacitor, tied to VIN when the high-side FET is on and to PGND when the low-side FET is on, with DC limits of -1V to VIN + 0.3V. |
| 10 | BST | power_out | Bootstrap pin; a capacitor between SW and BST is required to form the floating supply for the high-side switch driver, with VBST limited to VSW + 4.5V. |
| 11 | CLM | input | Current limit adjust input; connecting CLM to GND through different resistors selects one of four current limit settings, adjustable from 8.5A to 16.5A. |
| 12 | PG | output | Open-drain power good output that is high when the output voltage is within a proper range, with a sink capability of 4mA at 0.4V. |
| 13 | FB | input | Feedback input from an external resistor divider from the output to GND that sets the output voltage from 0.8V to 5.5V; the divider should be placed as close to FB as possible and vias should be avoided on the FB trace. |
| 14 | MODE | input | Mode select input that chooses the output range and selects DCM or CCM operation. |
| 15 | EN | input | Enable input; EN = 1 turns the regulator on and EN = 0 turns it off. |
| 16 | NC | unconnected | No connection; this pin can be tied to VIN, SW, or GND for easier layout. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | QFN-16(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Constant on timer | TON | 430 | 515 | 600 | ns | VIN = 5V, VOUT = 1.8V | 4 |
| Low-side valley current limit, CLM = 90kΩ | ILIMIT | 9 | 10 | 11 | A | CLM = 90kΩ | 4 |
| OVP threshold | VOVP | 125 | 130 | 135 | %VREF |  | 4 |
| UVP-1 threshold | VUVP-1 | 70 | 75 | 80 | %VREF |  | 4 |
| UVP-2 threshold | VUVP-2 | 45 | 50 | 55 | %VREF |  | 4 |
| Reference voltage | VREF | 594 | 600 | 606 | mV |  | 4 |
| Soft-start time | TSStart | 1.8 | 2.2 | 2.6 | ms | EN to PG up | 4 |
| Mode source current | IMODE | 9 | 10 | 11.4 | μA |  | 4 |
| En rising threshold | VEN TH | 1.12 | 1.22 | 1.32 | V |  | 4 |
| VCC under-voltage lockout threshold rising | VCCVth | 2.9 | 3 | 3.1 | V |  | 4 |
| Supply voltage VIN | VIN |  |  | 26 | V |  | 3 |
| VSW (DC) | VSW | -1 |  |  | V | DC; upper limit printed as VIN + 0.3V | 3 |
| VSW (25ns) | VSW | -3.6 |  |  | V | 25ns, measured with differential probe; upper limit printed as VIN + 4V | 3 |
| All other pins |  | -0.3 |  | 4.5 | V |  | 3 |
| Continuous power dissipation QFN-16 (3mmx3mm) |  |  |  | 2.3 | W | TA = +25°C | 3 |
| Junction temperature |  |  |  | 150 | °C |  | 3 |
| Lead temperature |  |  |  | 260 | °C |  | 3 |
| Storage temperature |  | -65 |  | 150 | °C |  | 3 |
| Supply voltage VIN (recommended) | VIN | 4.5 |  | 24 | V |  | 3 |
| Supply voltage VCC (recommended) | VCC | 3.15 |  | 3.5 | V |  | 3 |
| Output voltage VOUT (recommended) | VOUT | 0.8 |  | 5.5 | V |  | 3 |
| Operating junction temperature (recommended) | TJ | -40 |  | 125 | °C |  | 3 |
| Junction-to-ambient thermal resistance | θJA |  | 55 |  | °C/W | JESD51-7, 4-layer PCB | 3 |
| Junction-to-case thermal resistance | θJC |  | 13 |  | °C/W |  | 3 |

## CAD (KiCad official)

- Symbol: `MP8720GQ-Z`
- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`
- 3D model: QFN-16(3x3) (KiCad packages3D, STEP)
- 3D model files: `mp8720gq-z-etched.step` / `mp8720gq-z-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mp8720gq-z.step` / `mp8720gq-z.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Monolithic Power Systems datasheet](docs/mp8720gq-z-datasheet.pdf) (23 pp, sha256 `24ba9b9297d980e9`, retrieved 2026-10-28, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/mp8720gq-z-datasheet.pdf)