component
MP8009GV-Z
Public Made by Adomby adom
MONOLITHIC POWER SYSTEMS INC. Global Sourcing Parts, QFN-28(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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PCB Footprint
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Datasheet
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README
markdownMP8009GV-Z
MONOLITHIC POWER SYSTEMS INC. · Global Sourcing Parts · QFN-28(4x5)
MP8009GV-Z from MONOLITHIC POWER SYSTEMS INC., in a QFN-28(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection; it is recommended to connect NC pins to GND. |
| 2 | AUX | input | Auxiliary power input detector; driving VDD - AUX above 2.3V disables the hot-swap MOSFET and CLASS functions and forces T2P and PG active. |
| 3 | DET | input | Detection pin; connect a 24.9kΩ resistor between VDD and DET for PoE detection. |
| 4 | VDD | power_in | Positive power supply terminal for PoE and controller input power rail (absolute maximum 100V, recommended 0V to 57V). |
| 5 | NC | unconnected | No connection; it is recommended to connect NC pins to GND. |
| 6 | NC | unconnected | No connection; it is recommended to connect NC pins to GND. |
| 7 | NC | unconnected | No connection; it is recommended to connect NC pins to GND. |
| 8 | MODE | input | PSR/SSR mode and dead time setting; float for PSR, or connect to GND via a resistor for SSR. |
| 9 | COMP | output | Loop compensation pin that is the error amplifier output in PSR mode and is internally pulled to 5V through a 10kΩ resistor in SSR mode. |
| 10 | FB | input | Output voltage feedback and OVP monitor pin; connect to GND if the OVP function is not used in SSR mode. |
| 11 | GND | power_in | Ground pin. |
| 12 | GND | power_in | Ground pin. |
| 13 | SYNC | output | Synchronous MOSFET gate driver pin. |
| 14 | NC | unconnected | No connection; it is recommended to connect NC pins to GND. |
| 15 | GATE | output | Main MOSFET gate driver pin. |
| 16 | NC | unconnected | No connection; it is recommended to connect NC pins to GND. |
| 17 | VCC | power_out | DC/DC internal circuit supply pin powered through an internal LDO from VDD; bypass with at least 1µF for flyback or 4.7µF for forward, and keep below 16V if externally powered. |
| 18 | SENSE | input | Current-sense input that also sets PSR VOUT compensation and frequency dither via a resistor to the current sense resistor. |
| 19 | PG | output | PD supply power good indicator that enables the DC/DC converter internally; recommended to float in most applications. |
| 20 | RTN | passive | Drain of the PD hot-swap MOSFET; connect RTN to GND. |
| 21 | RTN | passive | Drain of the PD hot-swap MOSFET; connect RTN to GND. |
| 22 | NC | unconnected | No connection; it is recommended to connect NC pins to GND. |
| 23 | VSS | power_in | Negative power supply terminal from the PoE input power rail. |
| 24 | VSS | power_in | Negative power supply terminal from the PoE input power rail. |
| 25 | FTY | input | Factory use only; must be connected to VSS. |
| 26 | CLASS | passive | Classification pin; connect a resistor from CLASS to VSS to configure the classification current. |
| 27 | NC | unconnected | No connection; it is recommended to connect NC pins to GND. |
| 28 | T2P | output | Open-drain Type-2 PSE indicator pulled low to VSS to indicate a wall adapter or Type-2 PSE. |
| 29 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MONOLITHIC POWER SYSTEMS INC. |
| Package | QFN-28(4x5) |
| Category | Global Sourcing Parts |
| Pins | 29 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | 0 | 57 | V | 4 | ||
| VCC, GATE, SYNC voltage | 16 | V | 4 | ||||
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Max T2P sink current | 5 | mA | 4 | ||||
| Max PG sink current | 0.4 | mA | 4 | ||||
| Max FB sink current | -1 | 1 | mA | 4 | |||
| VDD, RTN, DET, T2P, AUX, GND voltage | -0.3 | 100 | V | with respect to VSS | 4 | ||
| CLASS, FTY voltage | -0.3 | 6.5 | V | with respect to VSS | 4 | ||
| VDD voltage | -0.3 | 100 | V | with respect to GND | 4 | ||
| VCC, GATE, SYNC voltage | -0.3 | 18 | V | with respect to GND | 4 | ||
| FB voltage | -0.5 | 5.5 | V | with respect to GND | 4 | ||
| MODE, COMP, SENSE voltage | -0.3 | 5.5 | V | with respect to GND | 4 | ||
| PG voltage | -0.3 | 6.5 | V | with respect to GND | 4 | ||
| AUX voltage | -6.5 | 0.3 | V | with respect to VDD | 4 | ||
| T2P sink current | 10 | mA | 4 | ||||
| PG sink current | 0.5 | mA | 4 | ||||
| FB sink current | -2 | 2 | mA | 4 | |||
| Junction temperature | 150 | °C | 4 | ||||
| Storage temperature | -55 | 150 | °C | 4 | |||
| Thermal resistance junction-ambient | θJA | 37 | °C/W | EV8009-V-00A | 4 | ||
| Thermal resistance junction-case | θJC | 2 | °C/W | EV8009-V-00A | 4 | ||
| Thermal resistance junction-ambient | θJA | 40 | °C/W | JESD51-7 | 4 | ||
| Thermal resistance junction-case | θJC | 9 | °C/W | JESD51-7 | 4 | ||
| DET leakage current | VDET-LK | 0.1 | 5 | μA | VDET = VDD = 57V, measure IDET | 5 | |
| Detection current | IDET | 96 | 99 | 102 | μA | VDD = 2.5V, measure ISUPPLY | 5 |
| Detection current | IDET | 395 | 410 | 425 | μA | VDD = 10.1V, measure ISUPPLY | 5 |
| VCLASS output voltage | VCLASS | 1.1 | 1.16 | 1.21 | V | 13V < VDD < 21V, 1mA < ICLASS < 42mA | 5 |
| Classification current | ICLASS | 1.8 | 2 | 2.4 | mA | RCLASS = 578Ω, 13V ≤ VDD ≤ 21V | 5 |
| Classification current | ICLASS | 9.9 | 10.55 | 11.3 | mA | RCLASS = 110Ω, 13V ≤ VDD ≤ 21V | 5 |
| Classification current | ICLASS | 17.7 | 18.7 | 19.8 | mA | RCLASS = 62Ω, 13V ≤ VDD ≤ 21V | 5 |
| Classification current | ICLASS | 26.6 | 28.15 | 29.7 | mA | RCLASS = 41.2Ω, 13V ≤ VDD ≤ 21V | 5 |
| Classification current | ICLASS | 38.2 | 40.4 | 42.6 | mA | RCLASS = 28.7Ω, 13V ≤ VDD ≤ 21V | 5 |
| Classification lower threshold | VCL-ON | 11.8 | 12.5 | 13 | V | Class regulator turns on, VDD rising | 5 |
| Classification upper threshold | VCL-OFF | 21 | 22 | 23 | V | Class regulator turns off, VDD rising | 5 |
| Mark event reset threshold | VMARK-L | 4.5 | 5 | 5.5 | V | 5 | |
| Max mark event voltage | VMARK-H | 11 | 11.5 | 12 | V | 5 | |
| Mark event current | IMARK | 0.5 | 1.5 | 2 | mA | 5 | |
| IC supply current during classification | IIN-CLASS | 220 | 300 | μA | VDD = 17.5V, CLASS floating | 5 | |
| Class leakage current | ILEAKAGE | 1 | μA | VCLASS = 0 V, VDD = 57V | 5 | ||
| VDD turn-on threshold | VDD-VSS-R | 35 | 37.5 | 40 | V | VDD rising | 5 |
| VDD turn-off threshold | VDD-VSS-F | 29 | 31 | 33 | V | VDD falling | 5 |
| IC supply current during operation | IIN | 450 | μA | 5 | |||
| On resistance | RON-RTN | 0.48 | Ω | IRTN = 600mA | 6 | ||
| RTN leakage current | IRTN-LK | 1 | 15 | μA | VDD = VRTN = 57V | 6 | |
| Current limit | ILIMIT | 720 | 840 | 920 | mA | VRTN = 1V | 6 |
| Inrush current limit | IINRUSH | 120 | mA | VRTN = 2V | 6 | ||
| Inrush to operation mode delay | tDELAY | 80 | 100 | ms | 6 | ||
| T2P output low voltage | 0.1 | 0.3 | V | IT2P = 2mA, respect to VSS | 6 | ||
| T2P output high leakage current | 1 | μA | VT2P = 48V | 6 | |||
| AUX leakage current | 2 | μA | VDD - VAUX = 6V | 6 | |||
| PG threshold for DC/DC switching | VPG-R | 1.93 | 2 | 2.07 | V | Start switching | 6 |
| VDD UVLO rising threshold | VDD-R | 4.5 | 5.5 | 6.5 | V | VDD rising, start charging VCC | 8 |
| VDD UVLO falling threshold | VDD-F | 3.8 | 4.8 | 5.8 | V | VDD falling | 8 |
| VCC UVLO rising threshold | VCC-R | 5.4 | 5.7 | 6 | V | VDD > VDD-R, VCC rising | 8 |
| VCC UVLO falling threshold | VCC-F | 5 | 5.3 | 5.6 | V | VDD > VDD-R, VCC falling | 8 |
| Quiescent current | IQ | 1250 | μA | MODE pin floating, VFB = -0.1V, SENSE = 100mV, COMP = 0V, IQ = IDD - ICOMP, GATE and SYNC floating | 8 | ||
| Quiescent current | IQ | 900 | μA | MODE = 0V, VCOMP = 0V, GATE and SYNC floating, IQ = IDD - ICOMP | 8 | ||
| FB reference voltage | VREF | 1.98 | 2 | 2.02 | V | TJ = 25°C | 8 |
| FB reference voltage | VREF | 1.97 | 2 | 2.03 | V | TJ = -40°C to +125°C | 8 |
| FB leakage current | IFB | 10 | 50 | nA | VFB = 2V | 8 | |
| FB OVP threshold | VFBOVP | 120 | 125 | 130 | %VREF | 8 | |
| Maximum current sense limit | ILIMIT-MAX | 140 | 160 | 180 | mV | 9 | |
| Low threshold current limit | ILIMIT-MIN | 33 | 36 | 39 | mV | In PSR mode | 9 |
| SCP limit | 240 | 300 | 360 | mV | 9 | ||
| SENSE input bias current | 10 | 50 | nA | VSENSE = 160mV | 9 | ||
| Switching frequency | fSW | 225 | 250 | 275 | kHz | 9 | |
| MODE pin detection current | IMODE | 35 | 40 | 45 | μA | 9 | |
| SENSE pin detection current | ISENSE | 90 | 100 | 110 | μA | 9 | |
| GATE maximum duty cycle | DMAX | 70 | % | 10 |
CAD (KiCad official)
- Symbol:
MP8009GV-Z - Footprint:
Package_DFN_QFN:QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm - 3D model: QFN-28(4x5) (KiCad packages3D, STEP)
- 3D model files:
mp8009gv-z-etched.step/mp8009gv-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp8009gv-z.step/mp8009gv-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MONOLITHIC POWER SYSTEMS INC. datasheet (39 pp, sha256
cfb61fe068bde1cb, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).