component
MP8007HGV-Z
Public Made by Adomby adom
Monolithic Power Systems Power Over Ethernet (PoE) Controllers, QFN-28(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMP8007HGV-Z
Monolithic Power Systems · Power Over Ethernet (PoE) Controllers · QFN-28(4x5)
MP8007HGV-Z from Monolithic Power Systems, in a QFN-28(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AUX | input | Auxiliary power input detector for adapter power supply applications; driving VDD-AUX above 2.3V disables the hot-swap MOSFET and CLASS pin function and forces T2P and PG to be active. |
| 2 | DET | passive | Connect a 24.9kΩ resistor between VDD and DET for PoE detection. |
| 3 | N/C | unconnected | Not connected internally; can be connected to the GND pin and exposed thermal pad in the layout. |
| 4 | VDD | power_in | Positive power supply terminal from the PoE input power rail. |
| 5 | FB2 | input | Feedback pin for the non-isolated buck solution; connect FB2 to VDD in flyback application mode. |
| 6 | MODE | input | Selects buck or flyback mode: float for buck application mode, connect to GND for flyback application mode; the pin is pulled up internally to VCC through a 1.5µA current source. |
| 7 | FB1 | input | Feedback for the flyback solution; connect FB1 to GND in buck application mode. |
| 8 | ILIM | input | DC/DC converter switching current limit program pin; connect to GND through a resistor to program the peak current limit. |
| 9 | AGND | power_in | Analog power return for the DC/DC converter control circuit; connect to GND through a single point. |
| 10 | VCC | power_out | Supply bias voltage powered through the internal LDO from VIN; a capacitor of no less than 1µF should be connected between VCC and GND. |
| 11 | N/C | unconnected | Not connected internally; can be connected to the GND pin and exposed thermal pad in the layout. |
| 12 | SW | passive | Drain of the converter switching MOSFET. |
| 13 | SW | passive | Drain of the converter switching MOSFET. |
| 14 | N/C | unconnected | Not connected internally; can be connected to the GND pin and exposed thermal pad in the layout. |
| 15 | N/C | unconnected | Not connected internally; can be connected to the GND pin and exposed thermal pad in the layout. |
| 16 | GND | power_in | Switching converter power return; connect to RTN for the PoE power supply. |
| 17 | GND | power_in | Switching converter power return; connect to RTN for the PoE power supply. |
| 18 | PG | output | PD supply power good indicator that enables the DC/DC converter internally; it is pulled up by an internal current source in output-high conditions and is recommended to be floated in application mode. |
| 19 | N/C | unconnected | Not connected internally; can be connected to the GND pin and exposed thermal pad in the layout. |
| 20 | RTN | passive | Drain of the PD hot-swap MOSFET; connect the RTN pin to GND and AGND. |
| 21 | RTN | passive | Drain of the PD hot-swap MOSFET; connect the RTN pin to GND and AGND. |
| 22 | N/C | unconnected | Not connected internally; can be connected to the GND pin and exposed thermal pad in the layout. |
| 23 | VSS | power_in | Negative power supply terminal from the PoE input power rail. |
| 24 | VSS | power_in | Negative power supply terminal from the PoE input power rail. |
| 25 | FTY | passive | Factory use only; connect FTY to VSS in application mode. |
| 26 | CLASS | passive | Connect a resistor from CLASS to VSS to program the classification current. |
| 27 | T2P | output | Type 2 PSE indicator; open-drain output that is pulled low to VSS to indicate the presence of a Type-2 PSE or when AUX is enabled. |
| 28 | N/C | unconnected | Not connected internally; can be connected to the GND pin and exposed thermal pad in the layout. |
| 29 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | QFN-28(4x5) |
| Category | Power Management (PMIC) |
| Pins | 29 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage VDD, RTN, DET, T2P, AUX, GND, AGND | -0.3 | 100 | V | Pins voltage respect to VSS | 4 | ||
| Voltage CLASS, FTY | -0.3 | 6.5 | V | Pins voltage respect to VSS | 4 | ||
| Voltage VDD | -0.3 | 100 | V | Pin voltage respect to GND | 4 | ||
| Voltage SW | -0.7 | 180 | V | Pin voltage respect to GND | 4 | ||
| Voltage FB1 | -0.7 | 6.5 | V | Pin voltage respect to GND | 4 | ||
| Voltage VCC, MODE, ILIM, PG | -0.3 | 6.5 | V | Pins voltage respect to GND | 4 | ||
| Voltage AUX, FB2 | -6.5 | 0.3 | V | Pins voltage respect to VDD | 4 | ||
| T2P current | 10 | mA | 4 | ||||
| VCC sinking current | 1.5 | mA | Note 4 applies | 4 | |||
| AUX sinking current | -5 | mA | Printed as -5 mA | 4 | |||
| FB1 sinking current | -1 | 1 | mA | Printed as ±1 mA | 4 | ||
| Junction temperature | 150 | °C | 4 | ||||
| Storage temperature | -65 | 150 | °C | 4 | |||
| Supply voltage (VDD) | VDD | 0 | 57 | V | 4 | ||
| Switching voltage (VSW) | VSW | -0.5 | 150 | V | 4 | ||
| Maximum T2P current | 5 | mA | 4 | ||||
| Maximum AUX sinking current | -3 | mA | Printed as -3mA | 4 | |||
| Maximum FB1 sinking current | -0.5 | 0.5 | mA | Printed as ±0.5 mA | 4 | ||
| Maximum switching frequency | 300 | kHz | 4 | ||||
| Maximum switching current limit | 3 | A | 4 | ||||
| Operating junction temperature (TJ) | TJ | -40 | 125 | °C | 4 | ||
| Detection current | IDET | 96 | 99 | 102 | μA | VDD = 2.5V, measure ISUPPLY | 5 |
| Detection current | IDET | 395 | 410 | 425 | μA | VDD = 10.1V, measure ISUPPLY | 5 |
| VCLASS output voltage | VCLASS | 1.1 | 1.16 | 1.21 | V | 13V < VDD < 21V, 1mA < ICLASS < 42mA | 5 |
| Classification current, RCLASS = 41.2Ω | ICLASS | 26.6 | 28.15 | 29.7 | mA | RCLASS = 41.2Ω, 13V ≤ VDD ≤ 21V | 5 |
| Classification lower threshold | VCL-ON | 11.8 | 12.5 | 13 | V | Class regulator turns on, VDD rising | 5 |
| Classification upper threshold | VCL-OFF | 21 | 22 | 23 | V | Class regulator turns off, VDD rising | 5 |
| Mark event reset threshold | VMARK-L | 4.5 | 5 | 5.5 | V | 5 | |
| Max mark event voltage | VMARK-H | 11 | 11.5 | 12 | V | 5 | |
| Mark event current | IMARK | 0.5 | 1.5 | 2 | mA | 5 | |
| VDD UVLO turn-on threshold | VDD-VSS-R | 35 | 37.5 | 40 | V | VDD rising | 5 |
| VDD UVLO turn-off threshold | VDD-VSS-F | 29 | 31 | 33 | V | VDD falling | 5 |
| Current limit (PD) | ILIMIT | 720 | 840 | 920 | mA | VRTN = 1V | 6 |
| Leakage current (PD pass device) | IRTN-LK | 1 | 15 | μA | VDD = VRTN = 57V | 6 | |
| Inrush to operation mode delay | tDELAY | 80 | 100 | 100 | ms | 6 | |
| T2P output low voltage | 0.1 | 0.3 | V | IT2P = 2mA, respect to VSS | 6 | ||
| Converter VDD UVLO rising threshold | VDD-RTN-R | 10.5 | 11.6 | 12.8 | V | PG-RTN = 5V, Test VDD-RTN | 7 |
| Converter VDD UVLO falling threshold | VDD-RTN-F | 7.4 | 8.2 | 9 | V | PG-RTN = 5V, Test VDD-RTN | 7 |
| VCC regulation | VCC | 4.8 | 5.4 | 5.9 | V | Load = 0mA to 10mA | 7 |
| VCC UVLO rising threshold | VCC-R | 4.3 | 4.7 | 5.1 | V | VDD is greater than UVLO, VCC rising | 7 |
| VCC UVLO falling threshold | VCC-F | 4 | 4.5 | 4.8 | V | VDD is greater than UVLO, VCC falling | 7 |
| FB1 reference voltage, TJ = 25°C | VREF1 | 1.94 | 1.99 | 2.04 | V | Respect to GND, TJ = 25°C | 7 |
| FB1 reference voltage, TJ = -40°C to +125°C | VREF1 | 1.93 | 1.99 | 2.05 | V | Respect to GND, TJ = -40°C to +125°C | 7 |
| Flyback mode DCM detect threshold on FB1 | VDCM1 | 25 | 50 | 75 | mV | Respect to GND | 7 |
| FB2 reference voltage, TJ = 25°C | VREF2 | -1.955 | -1.88 | -1.805 | V | Respect to VDD, TJ = 25°C | 7 |
| FB2 reference voltage, TJ = -40°C to +125°C | VREF2 | -1.96 | -1.88 | -1.8 | V | Respect to VDD, TJ = -40°C to +125°C | 7 |
| Switching current limit | ILIMIT | 1.85 | 2.05 | 2.25 | A | RILIM = 53.6kΩ, L = 47μH | 7 |
| AUX high-voltage threshold | -2.3 | V | Respect to VDD | 6 | |||
| AUX low-voltage threshold | -0.6 | V | Respect to VDD | 6 | |||
| PG high-level voltage to enable DC/DC converter | VPG-EN-H | 3.9 | V | 6 | |||
| PG low-level voltage to disable DC/DC converter | VPG-EN-L | 1.3 | V | 6 | |||
| IC supply current during operation | IIN | 450 | μA | 5 | |||
| Quiescent current | IQ | 0.87 | mA | VFB1 = 2.2V, VFB2 = VDD, test supply from VDD to VSS | 7 | ||
| Switching power device on resistance | RON-SW | 0.8 | Ω | VCC = 5.4V | 7 | ||
| On resistance (PD pass device) | RON-RTN | 0.48 | Ω | IRTN = 600mA | 6 | ||
| Thermal resistance junction-to-ambient, QFN-28 (4mmx5mm) | θJA | 40 | °C/W | Simulated JEDEC board per JESD51-7 (note 9), comparison only | 4 | ||
| Thermal resistance junction-to-case, QFN-28 (4mmx5mm) | θJC | 9 | °C/W | Simulated JEDEC board per JESD51-7 (note 9), comparison only | 4 |
CAD (KiCad official)
- Symbol:
MP8007HGV-Z - Footprint:
Package_DFN_QFN:QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm - 3D model: QFN-28(4x5) (KiCad packages3D, STEP)
- 3D model files:
mp8007hgv-z-etched.step/mp8007hgv-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp8007hgv-z.step/mp8007hgv-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (32 pp, sha256
7afe5036da621e1e, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).