component
MP6005GK-Z
Public Made by Adomby adom
Monolithic Power Systems AC-DC Controllers And Regulators, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MP6005GK-Z
Monolithic Power Systems · AC-DC Controllers And Regulators · MSOP-10
MP6005GK-Z from Monolithic Power Systems, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Internal circuit supply pin powered by the internal LDO from VIN, requiring a 1µF minimum capacitor to GND for flyback or 4.7µF minimum for forward application, and it may be driven by an external source to reduce LDO loss. |
| 2 | SENSE | input | Current-sense PSR, output voltage (VOUT) compensation, and frequency dithering setting pin. |
| 3 | EN | input | On/off control pin internally connected to GND through a 2.5MΩ resistor, with a turn-on threshold of 1.93V to 2.07V and an absolute maximum rating of -0.3V to +6.5V. |
| 4 | VIN | power_in | Input power supply pin with a recommended supply range of 8V to 80V (absolute maximum +100V), requiring a bypass capacitor to GND. |
| 5 | MODE | input | PSR/SSR mode and dead-time setting pin. |
| 6 | COMP | passive | Loop compensation pin that is the error amplifier output in PSR mode and is pulled up to 5V through an internal 10kΩ resistor in SSR mode. |
| 7 | FB | input | Output voltage feedback and OVP monitoring pin with a 2V reference, where sink and source currents must be limited (recommended maximum ±1mA) and it should be connected to GND if OVP is not used in SSR mode. |
| 8 | GND | power_in | Ground pin that serves as the power return for the controller. |
| 9 | SYNC | output | Synchronous MOSFET gate driver pin, rated for 0.8A drive per the datasheet features list. |
| 10 | GATE | output | Main MOSFET gate driver pin, rated for 2A drive per the datasheet features list. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | MSOP-10 |
| Category | Power Management (PMIC) |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (VIN) | VIN | -0.3 | 100 | V | 3 | ||
| VCC, VGATE, VSYNC voltage | VCC, VGATE, VSYNC | -0.3 | 18 | V | 3 | ||
| EN voltage | VEN | -0.3 | 6.5 | V | 3 | ||
| FB voltage | VFB | -0.5 | 5.5 | V | 3 | ||
| All other pins voltage | -0.3 | 5.5 | V | 3 | |||
| EN sinking current | 0.5 | mA | 3 | ||||
| FB sinking current | -2 | 2 | mA | 3 | |||
| Continuous power dissipation MSOP10 | 1.62 | W | TA = +25°C | 3 | |||
| Junction temperature | 150 | °C | 3 | ||||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Supply voltage (VIN) | VIN | 8 | 80 | V | 3 | ||
| Maximum VCC, GATE, SYNC voltage | 16 | V | 3 | ||||
| Maximum EN sink current | 0.4 | mA | 3 | ||||
| Maximum FB sink current | -1 | 1 | mA | 3 | |||
| Operating junction temperature | TJ | -40 | 125 | °C | 3 | ||
| UVLO rising threshold | VIN-R | 4.5 | 5.5 | 6.5 | V | VIN rising, start charge VCC | 4 |
| VIN UVLO falling threshold | VIN-F | 3.8 | 4.8 | 5.8 | V | VIN falling | 4 |
| VCC UVLO rising threshold | VCC-R | 5.4 | 5.7 | 6 | V | VIN > VIN-R, VCC rising | 4 |
| VCC UVLO falling threshold | VCC-F | 5 | 5.3 | 5.6 | V | VIN > VIN-R, VCC falling | 4 |
| FB reference voltage | VREF | 1.98 | 2 | 2.02 | V | TJ = 25°C | 4 |
| FB reference voltage | VREF | 1.97 | 2 | 2.03 | V | TJ = -40°C to +125°C | 4 |
| EN turn-on threshold | VEN-R | 1.93 | 2 | 2.07 | V | Start switching | 4 |
| FB over-voltage protection (OVP) threshold | VFBOVP | 120 | 125 | 130 | %VREF | 4 | |
| Minimum diode conduction time for FB sample | tSAMPLE | 0.5 | 0.6 | μs | 4 | ||
| MODE detection current | IMODE | 35 | 40 | 45 | μA | 5 | |
| SENSE detection current | ISENSE | 90 | 100 | 110 | μA | 5 | |
| Max CS limit | ILIMIT-MAX | 140 | 160 | 180 | mV | 5 | |
| Low current threshold | ILIMIT-MIN | 33 | 36 | 39 | mV | In PSR mode | 5 |
| Short-circuit protection (SCP) | 240 | 300 | 360 | mV | 5 | ||
| Switching frequency | fSW | 225 | 250 | 275 | kHz | 5 | |
| MODE/SENSE detection threshold, voltage level 2 range | VMODE/VSENSE | 0.25 | 0.4 | V | 5 | ||
| MODE/SENSE detection threshold, voltage level 3 range | VMODE/VSENSE | 0.55 | 0.85 | V | 5 | ||
| MODE/SENSE detection threshold, voltage level 4 range | VMODE/VSENSE | 1.1 | 1.5 | V | 5 | ||
| Thermal resistance junction-to-ambient (EV6005-K-00A board) | θJA | 77 | °C/W | EV6005-K-00A (note 6) | 3 | ||
| Thermal resistance junction-to-case (EV6005-K-00A board) | θJC | 17 | °C/W | EV6005-K-00A (note 6) | 3 | ||
| Thermal resistance junction-to-ambient (JESD51-7) | θJA | 150 | °C/W | JESD51-7 (note 7) | 3 | ||
| Thermal resistance junction-to-case (JESD51-7) | θJC | 65 | °C/W | JESD51-7 (note 7) | 3 | ||
| EN hysteresis | VEN-HYS | 0.2 | V | Stop switching | 4 | ||
| Quiescent supply current | IQ | 800 | μA | MODE pin float, VFB = -0.1V, VSENSE = 100mV, VCOMP = 0V, IQ = IIN - ICOMP, GATE and SYNC floating | 4 | ||
| Quiescent supply current | IQ | 450 | μA | VMODE = 0V, VCOMP = 0V, IQ = IIN - ICOMP, GATE and SYNC floating | 4 | ||
| Shutdown supply current | ISD | 1 | μA | VEN = 0V | 4 | ||
| EA transconductance | GEA | 0.59 | mA/V | MODE floating, VFB is ±50mV from VREF, VCOMP = 1.5V | 4 | ||
| COMP high voltage | VCOMP | 4 | V | MODE floating, VFB = 1.9V | 5 | ||
| COMP high voltage | VCOMP | 5 | V | VMODE = 0V, float COMP | 5 | ||
| Internal soft-start time | tSS | 4.7 | ms | When MODE is floating, test FB from 0V to 2V; when VMODE = 0V, test COMP from 1.5V to 3.5V | 5 | ||
| Minimum foldback frequency in PFM mode | 30 | kHz | In PSR mode, VCOMP = 0V | 5 | |||
| MODE/SENSE detection period | tMODE/tSENSE | 200 | μs | 5 | |||
| GATE sourcing impedance | IGATE | 2 | Ω | IGATE = -20mA | 5 | ||
| GATE sinking impedance | IGATE | 1.7 | Ω | IGATE = 20mA | 5 | ||
| GATE source current | 2 | A | VCC = 8.5V, GATE = 10nF, test gate rising speed | 5 | |||
| GATE sink current | 1.7 | A | VCC = 8.5V, GATE = 10nF, test gate falling speed | 6 | |||
| GATE low voltage output | VGATE | 0.05 | V | 6 | |||
| GATE minimum on time | tON-MIN | 250 | ns | 6 | |||
| GATE max duty cycle | DMAX | 70 | % | 6 | |||
| SYNC source current | 0.8 | A | VCC = 8.5V, SYNC = 10nF, test SYNC rising speed | 6 | |||
| SYNC sink current | 1.2 | A | VCC = 8.5V, SYNC = 10nF, test SYNC falling speed | 6 | |||
| Overload protection (OLP) hiccup on time | 4.8 | ms | 6 | ||||
| OLP hiccup off time | 340 | ms | 6 | ||||
| Thermal shutdown temperature | TSD | 150 | °C | 6 |
CAD (KiCad official)
- Symbol:
MP6005GK-Z - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
mp6005gk-z-etched.step/mp6005gk-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp6005gk-z.step/mp6005gk-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (30 pp, sha256
726317cd5870a420, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MP6005GK-Z
**Monolithic Power Systems** · AC-DC Controllers And Regulators · MSOP-10
MP6005GK-Z from Monolithic Power Systems, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Internal circuit supply pin powered by the internal LDO from VIN, requiring a 1µF minimum capacitor to GND for flyback or 4.7µF minimum for forward application, and it may be driven by an external source to reduce LDO loss. |
| 2 | SENSE | input | Current-sense PSR, output voltage (VOUT) compensation, and frequency dithering setting pin. |
| 3 | EN | input | On/off control pin internally connected to GND through a 2.5MΩ resistor, with a turn-on threshold of 1.93V to 2.07V and an absolute maximum rating of -0.3V to +6.5V. |
| 4 | VIN | power_in | Input power supply pin with a recommended supply range of 8V to 80V (absolute maximum +100V), requiring a bypass capacitor to GND. |
| 5 | MODE | input | PSR/SSR mode and dead-time setting pin. |
| 6 | COMP | passive | Loop compensation pin that is the error amplifier output in PSR mode and is pulled up to 5V through an internal 10kΩ resistor in SSR mode. |
| 7 | FB | input | Output voltage feedback and OVP monitoring pin with a 2V reference, where sink and source currents must be limited (recommended maximum ±1mA) and it should be connected to GND if OVP is not used in SSR mode. |
| 8 | GND | power_in | Ground pin that serves as the power return for the controller. |
| 9 | SYNC | output | Synchronous MOSFET gate driver pin, rated for 0.8A drive per the datasheet features list. |
| 10 | GATE | output | Main MOSFET gate driver pin, rated for 2A drive per the datasheet features list. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | MSOP-10 |
| Category | Power Management (PMIC) |
| Pins | 10 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (VIN) | VIN | -0.3 | | 100 | V | | 3 |
| VCC, VGATE, VSYNC voltage | VCC, VGATE, VSYNC | -0.3 | | 18 | V | | 3 |
| EN voltage | VEN | -0.3 | | 6.5 | V | | 3 |
| FB voltage | VFB | -0.5 | | 5.5 | V | | 3 |
| All other pins voltage | | -0.3 | | 5.5 | V | | 3 |
| EN sinking current | | | | 0.5 | mA | | 3 |
| FB sinking current | | -2 | | 2 | mA | | 3 |
| Continuous power dissipation MSOP10 | | | | 1.62 | W | TA = +25°C | 3 |
| Junction temperature | | | | 150 | °C | | 3 |
| Storage temperature | | -65 | | 150 | °C | | 3 |
| Supply voltage (VIN) | VIN | 8 | | 80 | V | | 3 |
| Maximum VCC, GATE, SYNC voltage | | | | 16 | V | | 3 |
| Maximum EN sink current | | | | 0.4 | mA | | 3 |
| Maximum FB sink current | | -1 | | 1 | mA | | 3 |
| Operating junction temperature | TJ | -40 | | 125 | °C | | 3 |
| UVLO rising threshold | VIN-R | 4.5 | 5.5 | 6.5 | V | VIN rising, start charge VCC | 4 |
| VIN UVLO falling threshold | VIN-F | 3.8 | 4.8 | 5.8 | V | VIN falling | 4 |
| VCC UVLO rising threshold | VCC-R | 5.4 | 5.7 | 6 | V | VIN > VIN-R, VCC rising | 4 |
| VCC UVLO falling threshold | VCC-F | 5 | 5.3 | 5.6 | V | VIN > VIN-R, VCC falling | 4 |
| FB reference voltage | VREF | 1.98 | 2 | 2.02 | V | TJ = 25°C | 4 |
| FB reference voltage | VREF | 1.97 | 2 | 2.03 | V | TJ = -40°C to +125°C | 4 |
| EN turn-on threshold | VEN-R | 1.93 | 2 | 2.07 | V | Start switching | 4 |
| FB over-voltage protection (OVP) threshold | VFBOVP | 120 | 125 | 130 | %VREF | | 4 |
| Minimum diode conduction time for FB sample | tSAMPLE | 0.5 | | 0.6 | μs | | 4 |
| MODE detection current | IMODE | 35 | 40 | 45 | μA | | 5 |
| SENSE detection current | ISENSE | 90 | 100 | 110 | μA | | 5 |
| Max CS limit | ILIMIT-MAX | 140 | 160 | 180 | mV | | 5 |
| Low current threshold | ILIMIT-MIN | 33 | 36 | 39 | mV | In PSR mode | 5 |
| Short-circuit protection (SCP) | | 240 | 300 | 360 | mV | | 5 |
| Switching frequency | fSW | 225 | 250 | 275 | kHz | | 5 |
| MODE/SENSE detection threshold, voltage level 2 range | VMODE/VSENSE | 0.25 | | 0.4 | V | | 5 |
| MODE/SENSE detection threshold, voltage level 3 range | VMODE/VSENSE | 0.55 | | 0.85 | V | | 5 |
| MODE/SENSE detection threshold, voltage level 4 range | VMODE/VSENSE | 1.1 | | 1.5 | V | | 5 |
| Thermal resistance junction-to-ambient (EV6005-K-00A board) | θJA | | 77 | | °C/W | EV6005-K-00A (note 6) | 3 |
| Thermal resistance junction-to-case (EV6005-K-00A board) | θJC | | 17 | | °C/W | EV6005-K-00A (note 6) | 3 |
| Thermal resistance junction-to-ambient (JESD51-7) | θJA | | 150 | | °C/W | JESD51-7 (note 7) | 3 |
| Thermal resistance junction-to-case (JESD51-7) | θJC | | 65 | | °C/W | JESD51-7 (note 7) | 3 |
| EN hysteresis | VEN-HYS | | 0.2 | | V | Stop switching | 4 |
| Quiescent supply current | IQ | | 800 | | μA | MODE pin float, VFB = -0.1V, VSENSE = 100mV, VCOMP = 0V, IQ = IIN - ICOMP, GATE and SYNC floating | 4 |
| Quiescent supply current | IQ | | 450 | | μA | VMODE = 0V, VCOMP = 0V, IQ = IIN - ICOMP, GATE and SYNC floating | 4 |
| Shutdown supply current | ISD | | 1 | | μA | VEN = 0V | 4 |
| EA transconductance | GEA | | 0.59 | | mA/V | MODE floating, VFB is ±50mV from VREF, VCOMP = 1.5V | 4 |
| COMP high voltage | VCOMP | | 4 | | V | MODE floating, VFB = 1.9V | 5 |
| COMP high voltage | VCOMP | | 5 | | V | VMODE = 0V, float COMP | 5 |
| Internal soft-start time | tSS | | 4.7 | | ms | When MODE is floating, test FB from 0V to 2V; when VMODE = 0V, test COMP from 1.5V to 3.5V | 5 |
| Minimum foldback frequency in PFM mode | | | 30 | | kHz | In PSR mode, VCOMP = 0V | 5 |
| MODE/SENSE detection period | tMODE/tSENSE | | 200 | | μs | | 5 |
| GATE sourcing impedance | IGATE | | 2 | | Ω | IGATE = -20mA | 5 |
| GATE sinking impedance | IGATE | | 1.7 | | Ω | IGATE = 20mA | 5 |
| GATE source current | | | 2 | | A | VCC = 8.5V, GATE = 10nF, test gate rising speed | 5 |
| GATE sink current | | | 1.7 | | A | VCC = 8.5V, GATE = 10nF, test gate falling speed | 6 |
| GATE low voltage output | VGATE | | 0.05 | | V | | 6 |
| GATE minimum on time | tON-MIN | | 250 | | ns | | 6 |
| GATE max duty cycle | DMAX | | 70 | | % | | 6 |
| SYNC source current | | | 0.8 | | A | VCC = 8.5V, SYNC = 10nF, test SYNC rising speed | 6 |
| SYNC sink current | | | 1.2 | | A | VCC = 8.5V, SYNC = 10nF, test SYNC falling speed | 6 |
| Overload protection (OLP) hiccup on time | | | 4.8 | | ms | | 6 |
| OLP hiccup off time | | | 340 | | ms | | 6 |
| Thermal shutdown temperature | TSD | | 150 | | °C | | 6 |
## CAD (KiCad official)
- Symbol: `MP6005GK-Z`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `mp6005gk-z-etched.step` / `mp6005gk-z-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mp6005gk-z.step` / `mp6005gk-z.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Monolithic Power Systems datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590922714842677249) (30 pp, sha256 `726317cd5870a420`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mp6005gk-z-datasheet.pdf)