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MP5418GQG-Z

Public Made by Adom

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Monolithic Power Systems DC-DC Converters, QFN-10(1.4x1.8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MP5418GQG-Z

Monolithic Power Systems · DC-DC Converters · QFN-10(1.4x1.8)

MP5418GQG-Z from Monolithic Power Systems, in a QFN-10(1.4x1.8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Power ground.
2 EN input On/off control: pulling EN higher than 0.8V enables the device, while floating EN or pulling it to ground disables it.
3 CTL input Analog input voltage; the VOUT2 voltage will be -1x the CTL pin voltage.
4 N/C unconnected Recommended to be connected to ground.
5 VOUT2 power_out Negative linear regulator output; a decoupling capacitor is needed.
6 GND power_in Power ground.
7 VOUT1 power_out Negative charge pump output; a decoupling capacitor is needed.
8 CN passive Negative terminal of the fly capacitor.
9 CP passive Positive terminal of the fly capacitor.
10 IN power_in Supply voltage: the device operates from a +2.3V to +5V unregulated input and a decoupling capacitor is needed to prevent large voltage spikes at the input.

Key specifications

Parameter Value
Manufacturer Monolithic Power Systems
Package QFN-10(1.4x1.8)
Category Power Management (PMIC)
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (VIN) VIN -0.3 6 V 3
VOUT1 VOUT1 -6 0.3 V 3
All Other Pins -0.3 6 V 3
Junction Temperature 150 °C 3
Lead Temperature 260 °C 3
Continuous Power Dissipation 1.47 W TA = +25°C 3
Storage Temperature -65 150 °C 3
VCP VCP -0.3 V Upper limit printed as VIN+0.3V 3
VCN VCN 0.3 V Lower limit printed as VOUT-0.3V 3
VOUT2 VOUT2 0.3 V Lower limit printed as VOUT1 3
Supply Voltage (VIN) VIN 2.3 5 V 3
Operating Junction Temp. (TJ) TJ -40 125 °C 3
VIN range 2.3 5 V 4
Under-voltage lockout threshold 2.2 2.3 V rising 4
Under-voltage lockout threshold hysteresis 100 180 260 mV 4
Supply current (shutdown) 1.5 3 μA VEN=0V 4
Supply current (quiescent) 220 260 μA VEN=2V, no load, TJ = +25°C 4
Supply current (quiescent) 360 μA VEN=2V, no load, TJ > -40°C & TJ < +125°C 4
Charge pump frequency 30 550 kHz Detect VIN & VOUT1, TJ = +25°C 4
Charge pump current limit 0.6 1 A 4
Load current limit 200 250 mA VIN=3.3V, VOUT2=-2.5V 4
Output accuracy -1 1 % Compared with CTL voltage, room temp, IOUT2=10mA 4
Output accuracy (over temp) -2 2 % Over temp, IOUT2=10mA 4
Output offset -20 20 mV IOUT2=10mA 4
Dropout voltage VDROP 30 90 mV VIN=2.5V, IOUT2=60mA 4
Dropout voltage VDROP 20 80 mV VIN=3.3V, IOUT2=60mA 4
Load regulation 0.005 0.01 %/mA VOUT1=-3.3V, CTL=1V 4
EN turn-on delay 135 285 μs 4
EN input logic low voltage 0.4 V 4
EN input logic high voltage 1.2 V 4
Output discharge resistor RDIS1 RDIS1 170 310 Ω VEN=0V, VOUT1 rail 4
Output discharge resistor RDIS2 RDIS2 80 146 Ω VEN=0V, VOUT2 rail 4
EN input current 1.4 1.8 2.2 μA VEN=2V 4
PSRR PSRR 60 dB 100Hz, COUT1=100pF, COUT2=1μF, IOUT2=10mA 4
PSRR PSRR 50 dB 50kHz, COUT1=100pF, COUT2=1μF, IOUT2=10mA 4
PSRR PSRR 40 dB 300kHz, COUT1=100pF, COUT2=1μF, IOUT2=10mA 4
Charge pump MOS RON RON 0.24 Ω 4
Soft-start slew-rate 5 V/ms 4
EN input current 0 μA VEN=0V 4
Thermal shutdown 160 °C 4
Thermal hysteresis 30 °C 4
Recommended input capacitance CIN 4.7 μF VIN=3.3V 5
Recommended fly capacitor CFly 4.7 μF 5
Recommended VOUT1 capacitor 4.7 μF 5
Recommended VOUT2 capacitor 4.7 μF 5
Output ripple (VOUT1) VRipple_OUT1 50 mV VIN=3.3V, VOUT1=-3.3V, CFLY=COUT1=4.7μF, IOUT1=60mA 5
Output ripple (VOUT2) VRipple_OUT2 1 mV VIN=3.3V, VOUT2=2.5V, COUT2=1μF, IoUT2=60mA 5
Thermal resistance junction-to-ambient θJA θJA 85 °C/W EV5418-G-00B, 2-layer 63mmx63mm PCB 3
Thermal resistance junction-to-case θJC θJC 45 °C/W EV5418-G-00B, 2-layer 63mmx63mm PCB 3
Thermal resistance junction-to-ambient θJA θJA 140 °C/W JESD51-7 JEDEC board (for comparison only) 3
Thermal resistance junction-to-case θJC θJC 30 °C/W JESD51-7 JEDEC board (for comparison only) 3

CAD (KiCad official)

  • Symbol: MP5418GQG-Z
  • Footprint: Package_DFN_QFN:UQFN-10_1.4x1.8mm_P0.4mm
  • 3D model: QFN-10(1.4x1.8) (KiCad packages3D, STEP)
  • 3D model files: mp5418gqg-z-etched.step / mp5418gqg-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mp5418gqg-z.step / mp5418gqg-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Monolithic Power Systems datasheet (16 pp, sha256 ddc0702f388e6c9f, retrieved 2026-10-28, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF