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MP4570GF-Z

Monolithic Power Systems · Global Sourcing Parts · TSSOP-20-EP

MP4570GF-Z from Monolithic Power Systems, in a TSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP passive Compensation network setting: connect an external resistor in series with a capacitor between this pin and GND.
2 FB input Feedback input to the PWM comparator; connect an external resistive divider between the output and GND (VFB is 1V nominal, 0.98V to 1.02V).
3 FREQ input Switching frequency setting pin: a resistor from this pin to GND sets fSW, and an external SYNC clock applied here (HIGH above 1.5V, LOW below 1V, 100kHz to 1MHz recommended) makes the converter follow it.
4 EN input Enable input: drive above 1.6V to turn the regulator on and below 1.3V to turn it off; there is no internal pull-up or pull-down, so the pin must not be left floating.
5 BST power_out Bootstrap pin for the internal floating high-side MOSFET driver; connect a bootstrap capacitor (0.1µF typical) between this pin and SW.
6 VIN power_in Input supply for the internal control circuitry and VDD regulator; place a decoupling capacitor to ground close to this pin, with a recommended supply range of 4.5V to 55V.
7 VIN power_in Input supply for the internal control circuitry and VDD regulator; place a decoupling capacitor to ground close to this pin, with a recommended supply range of 4.5V to 55V.
8 VIN power_in Input supply for the internal control circuitry and VDD regulator; place a decoupling capacitor to ground close to this pin, with a recommended supply range of 4.5V to 55V.
9 NC unconnected Not connected; float this pin in the application.
10 SW power_out Switch node, the output node from the internal high-side MOSFET source; absolute maximum VSW is -0.5V to (VIN+0.5V).
11 SW power_out Switch node, the output node from the internal high-side MOSFET source; absolute maximum VSW is -0.5V to (VIN+0.5V).
12 NC unconnected Not connected; float this pin in the application.
13 GND power_in Power ground pin for the internal power MOSFETs; connect to a large copper ground area for thermal performance.
14 GND power_in Power ground pin for the internal power MOSFETs; connect to a large copper ground area for thermal performance.
15 GND power_in Power ground pin for the internal power MOSFETs; connect to a large copper ground area for thermal performance.
16 VDD power_out Power output for the internal MOSFET driver and BST charging circuit, regulated at 3.6V with BIAS floating and 4.8V with BIAS above 5.4V; a 1µF decoupling capacitor is needed close to the pin.
17 BIAS power_in Optional external 5V supply input that powers the internal circuitry when used, recommended in the 3.3V to 5.5V range; float or connect to GND if not used.
18 PG output Power good open-drain output indicating normal operation after soft start; connect a resistor to a pull-up source (e.g., 100kΩ) if used.
19 SS passive Optional external soft-start setting: connect a capacitor between this pin and GND to set soft-start time, or float the pin to activate the internal 0.5ms soft-start.
20 AGND power_in Ground for the internal logic and signal circuits.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Monolithic Power Systems
Package TSSOP-20-EP
Category Global Sourcing Parts
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Feedback Voltage VFB 0.98 1 1.02 V 4.5V ≤ VIN ≤ 55V 5
Error AMP Transconductance 430 630 730 μA/V 5
COMP Sink/Source Current ICOMP 13 30 52 μA 5
Upper Switch On Resistance RON_HS 90 120 mΩ 5
Lower Switch On Resistance RON_LS 70 100 mΩ 5
Peak Current Limit ILIMIT 4.5 5.7 7.5 A 10% Duty Cycle 5
Quiescent Supply Current IQ 450 550 µA No load, Without Switching 5
Shutdown Supply Current ISHDN 7 12 µA VEN = 0V 5
VDD Regulator Output Voltage (BIAS = NC) VDD 3.4 3.6 3.8 V BIAS = NC 5
VDD Regulator Output Voltage (BIAS = External 5V Power) VDD 4.6 4.8 V BIAS = External 5V Power 5
EN Rising Threshold VEN_R 1.4 1.6 1.8 V 5
EN Falling Threshold VEN_F 1.1 1.3 1.5 V 5
VIN UVLO Rising Threshold VINUV R 3.7 3.9 4.1 V 5
VIN UVLO Falling Threshold VINUV F 3.3 3.5 3.7 V 5
External Soft Start Capacitor Charging Current ISS 2.5 4 5.5 μA VSS=1V 5
Switching Frequency fSW 400 520 640 kHz RFREQ=100k 6
Output OVP Threshold VOVP 108 115 122 % VFB(OVP)/VFB 6
Power Good Threshold (VOUT Rising) VPG_TH 86 90 94 % VOUT Rising, VFB(PG)/VFB 6
Power Good Threshold (VOUT Falling) VPG_TH 81 85 89 % VOUT Falling, VFB(PG)/VFB 6
Power Good Delay (VOUT Rising) tPG_DL 8 22 37 μs VOUT Rising 6
Power Good Delay (VOUT Falling) tPG_DL 8 21 33 μs VOUT Falling 6
SYNC Frequency Range fSYNC 100 1000 kHz 6
Thermal Shutdown TSD 150 170 °C Derived from bench characterization, not tested in production (note 4) 6
Upper Switch Leakage Current ILKG_SW 10 300 nA VEN = 0V, VSW = 0V 5
FB Current IFB 10 50 nA VFB=1.07V 5
SYNC Leakage Current ILKG_SYNC 10 100 nA 6
Absolute max: Supply Voltage VIN VIN 60 V 4
Absolute max: VSW VSW -0.5 V Upper limit printed as VIN+0.5V (not converted) 4
Absolute max: All Other Pins -0.3 6 V 4
Absolute max: EN Sink Current 150 μA 4
Absolute max: Continuous Power Dissipation TSSOP-20 EP 2.78 W TA = 25°C 4
Absolute max: Junction Temperature 150 °C 4
Absolute max: Lead Temperature 260 °C 4
Absolute max: Storage Temperature -65 150 °C 4
Recommended: Supply Voltage VIN VIN 4.5 55 V 4
Recommended: Output Voltage VOUT VOUT 1 V Upper limit printed as 0.9·VIN (not converted) 4
Recommended: Operating Junction Temperature TJ -40 125 °C 4
Thermal Resistance Junction-to-Ambient θJA 45 °C/W Measured on JESD51-7, 4-layer PCB 4
Thermal Resistance Junction-to-Case θJC 10 °C/W 4
Minimum Off Time tOFF MIN 100 ns 5
Minimum On Time tON_MIN 90 ns 5
EN Threshold Hysteresis VEN_HYS 300 mV 5
VIN UVLO Threshold Hysteresis VINUV HYS 400 mV 5
Power Good Hysteresis VPG_HYS 5 % ΔVFB(PG)/VFB 6
Thermal Shutdown Hysteresis TSD_HYS 10 °C Derived from bench characterization, not tested in production (note 4) 6

CAD (KiCad official)

  • Symbol: MP4570GF-Z
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: TSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: mp4570gf-z-etched.step / mp4570gf-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mp4570gf-z.step / mp4570gf-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Monolithic Power Systems datasheet (22 pp, sha256 41b8403f2e52fbe6, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF