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MP4316GRE-Z

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Monolithic Power Systems Power Distribution Switches, QFN-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MP4316GRE-Z

Monolithic Power Systems · Power Distribution Switches · QFN-20(4x4)

MP4316GRE-Z from Monolithic Power Systems, in a QFN-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MODE input Mode selection: pull high for forced continuous conduction mode (FCCM), pull low for advanced asynchronous modulation (AAM) mode, and do not float.
2 SYNCIN input Synchronous input that accepts a 350kHz to 1000kHz clock to synchronize the internal oscillator, and needs a resistor of ≤51kΩ to AGND if the external clock pull-down is insufficient or the pin enters Hi-Z; do not float.
3 VIN power_in Input supply that powers the internal circuitry and the HS-FET, with a decoupling capacitor placed close to the pin and connected to PGND; the recommended VIN range is 3.3V to 45V.
4 PGND power_in Power ground pin; the datasheet gives no further electrical limits for it.
5 PGND power_in Power ground pin; the datasheet gives no further electrical limits for it.
6 BST power_in Bootstrap pin that is the positive supply for the HS-FET gate drive, with a bypass capacitor connected between BST and SW.
7 SW output Switch output, the output of the internal power MOSFETs.
8 SW output Switch output, the output of the internal power MOSFETs.
9 EN input Enable: pull above 1V to turn the converter on and below 0.85V to turn it off.
10 PGND power_in Power ground pin; the datasheet gives no further electrical limits for it.
11 PGND power_in Power ground pin; the datasheet gives no further electrical limits for it.
12 VIN power_in Input supply that powers the internal circuitry and the HS-FET, with a decoupling capacitor placed close to the pin and connected to PGND; the recommended VIN range is 3.3V to 45V.
13 SYNCO output Synchronous output that provides a clock 180° out of phase with the internal oscillator (or the inverse of the SYNCIN clock); float if not used.
14 PG output Open-drain power good output that requires a pull-up resistor; it is pulled high when VOUT is 95% to 105% of nominal and pulled low when VOUT exceeds 106.5% or drops below 93% of nominal.
15 NC unconnected Not connected; float this pin if not used.
16 VCC power_out Bias supply that provides 4.9V to the internal control circuit and gate drivers, decoupled to AGND with a capacitor placed close to the pin.
17 AGND power_in Analog ground.
18 FB input Feedback input connected to the center of the output resistor divider to set VOUT; the feedback voltage VFB is about 0.815V, and the divider should sit as close to FB as possible.
19 SS passive Soft-start input where a capacitor from SS to AGND sets the soft-start time, with 13µA supplied to the capacitor during start-up.
20 FREQ passive Switching frequency setting where a resistor from FREQ to AGND sets fSW, using the fSW vs. RFREQ curves on page 15.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Monolithic Power Systems
Package QFN-20(4x4)
Category Power Management (PMIC)
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN under-voltage lockout (UVLO) rising threshold VIN_UVLO_RISING 2.8 3 3.2 V 6
VIN UVLO falling threshold VIN_UVLO_FALLING 2.5 2.7 2.9 V 6
VCC voltage VCC 4.6 4.9 5.2 V IVCC = 0A 6
VCC voltage regulation 1 4 % IVCC = 30mA 6
Quiescent current during sleep mode ISLEEP 18 26 μA VFB = 0.85V, sleep mode, no load 6
Shutdown current ISD 1.7 3.5 μA VEN = 0V 6
Feedback (FB) voltage VFB 0.807 0.815 0.823 V VIN = 3.3V to 45V, TJ = 25°C 6
Feedback (FB) voltage VFB 0.799 0.815 0.831 V VIN = 3.3V to 45V 6
FB current IFB -50 0 50 nA VFB = 0.85V 6
Switching frequency fSW 420 470 520 kHz RFREQ = 62kΩ 6
Switching frequency fSW 820 1000 1180 kHz RFREQ = 26.1kΩ 6
SYNCIN clock range fSYNC 350 1000 kHz External clock 6
SYNCO high voltage VSYNCO_HIGH 3.3 4.5 V ISYNCO = -1mA 6
High-side MOSFET (HS-FET) peak current limit ILIMIT_PEAK 10 13 16 A 30% duty cycle 6
Low-side MOSFET (LS-FET) valley current limit ILIMIT_VALLEY 8 10 12 A 6
Zero-current detection (ZCD) current IZCD -0.15 0.1 0.35 A AAM mode 6
LS reverse current limit ILIMIT_REVERSE 2 4.5 7 A FCCM 6
Switch leakage current ISW_LKG 0.01 1 µA 6
HS-FET on resistance RDS(ON)_HS 48 80 mΩ VBST - VSW = 5V 6
LS-FET on resistance RDS(ON)_LS 20 40 mΩ VCC = 5V 6
Soft-start current ISS 8 13 19 µA VSS = 0V 6
EN rising threshold VEN_RISING 0.8 1 1.2 V 6
EN falling threshold VEN_FALLING 0.65 0.85 1.05 V 6
PG rising threshold VPG_RISING 92 95 98 % of VREF VFB rising, VFB / VREF 7
PG rising threshold VPG_RISING 102 105 108 % of VREF VFB falling, VFB / VREF 7
PG falling threshold VPG_FALLING 90.5 93.5 96.5 % of VREF VFB falling, VFB / VREF 7
PG falling threshold VPG_FALLING 103.5 106.5 109.5 % of VREF VFB rising, VFB / VREF 7
PG output low voltage VPG_LOW 0.1 0.3 V ISINK = 1mA 7
VIN, EN absolute maximum voltage -0.3 50 V 5
SW absolute maximum voltage -0.3 V 5
All other pins absolute maximum voltage -0.3 5.5 V 5
Operating junction temperature 150 °C 5
Storage temperature -65 150 °C 5
ESD Human body model (HBM) -2 2 kV 5
ESD Charged device model (CDM) -750 750 V 5
Input voltage (VIN) VIN 3.3 45 V 5
Output voltage (VOUT) VOUT 0.815 V 5
Operating junction temp (TJ) TJ -40 125 °C 5
Thermal resistance junction-to-case, QFN-20 (4mmx4mm) θJC 9 °C/W JESD51-7 5
Thermal resistance junction-to-case, EVQ4316-R-00A board θJC 2.5 °C/W EVQ4316-R-00A 5

CAD (KiCad official)

  • Symbol: MP4316GRE-Z
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: QFN-20(4x4) (KiCad packages3D, STEP)
  • 3D model files: mp4316gre-z-etched.step / mp4316gre-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mp4316gre-z.step / mp4316gre-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Monolithic Power Systems datasheet (38 pp, sha256 9709859de77dbb8b, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF