MP3364GR-Z

{
  "schema_version": 1,
  "type": "component",
  "slug": "mp3364gr-z",
  "title": "MP3364GR-Z",
  "brief": "Monolithic Power Systems LED Drivers, QFN-24(4x4). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "led drivers",
    "mp3364gr-z"
  ],
  "component": {
    "mpn": "MP3364GR-Z",
    "manufacturer": "Monolithic Power Systems",
    "package": "QFN-24(4x4)",
    "pin_count": 25,
    "category": "LED Drivers",
    "subcategory": "LED Drivers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590922716013158400",
    "parts": {
      "symbol": "mp3364gr-z.kicad_sym",
      "footprint": "mp3364gr-z.kicad_mod",
      "model_3d": "mp3364gr-z-etched.glb",
      "model_3d_plain": "mp3364gr-z.glb",
      "model_3d_step": "mp3364gr-z-etched.step",
      "model_3d_step_plain": "mp3364gr-z.step",
      "lbr": "mp3364gr-z.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "DIM",
        "type": "input",
        "description": "PWM signal input pin for brightness control. Internally pulled low; recommended PWM frequency 100Hz to 20kHz. VDIM_LO = 0.4V (max, falling), VDIM_HI = 1.2V (min, rising)."
      },
      {
        "number": "2",
        "name": "MIX/AD",
        "type": "input",
        "description": "Dimming mode setting pin with 18μA current-source output. Voltage set by external resistor: <0.3V = mixed dimming, 0.5V-0.8V = PWM dimming, 1.0V-1.3V = analog dimming; float to use internal MODE register."
      },
      {
        "number": "3",
        "name": "FREQ/SYNC",
        "type": "bidirectional",
        "description": "Switching frequency setting and external SYNC pin. Resistor to GND sets fSW (fSW(kHz)=22000/R(kΩ)), or drive with an external clock to synchronize. Float to use internal FSW1:0 register. VFREQ ≈ 0.6V."
      },
      {
        "number": "4",
        "name": "EN",
        "type": "input",
        "description": "IC enable pin. Pull high to enable (VEN_ON = 1.2V min rising), pull low to shut down (VEN_OFF = 0.4V max falling). 1MΩ internal pull-down resistor."
      },
      {
        "number": "5",
        "name": "SCL/PSE",
        "type": "bidirectional",
        "description": "I2C interface clock input. Alternatively, tie SCL/PSE together with SDA/PSE and bias between 0.75V and 1V to enable the phase-shift PWM dimming function. Tie to GND if phase shift is not used."
      },
      {
        "number": "6",
        "name": "SDA/PSE",
        "type": "bidirectional",
        "description": "I2C interface data input. Alternatively, tie SDA/PSE together with SCL/PSE and bias between 0.75V and 1V to enable the phase-shift PWM dimming function. Tie to GND if phase shift is not used."
      },
      {
        "number": "7",
        "name": "COMP",
        "type": "passive",
        "description": "Loop compensation pin for the boost converter error amplifier. Connect an RC compensation network from COMP to AGND. GCOMP ≈ 100μA/V; source/sink limits 90μA/30μA."
      },
      {
        "number": "8",
        "name": "FF",
        "type": "output",
        "description": "Fault flag output. Open-drain; high (via external pull-up) during normal operation and pulled low if a fault occurs. VOL = 0.4V max at ILOAD = 3mA."
      },
      {
        "number": "9",
        "name": "ISET",
        "type": "passive",
        "description": "LED full-scale current setting. Tie a resistor from ISET to GND to set per-string LED current: ILED(mA) = 1245/R_ISET(kΩ). VISET ≈ 1.2V; RISET = 24.9kΩ yields ILED = 50mA."
      },
      {
        "number": "10",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference. All logic signals must be referenced to AGND. Externally connect to PGND and to the exposed pad."
      },
      {
        "number": "11",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference. All logic signals must be referenced to AGND. Externally connect to PGND and to the exposed pad."
      },
      {
        "number": "12",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference. All logic signals must be referenced to AGND. Externally connect to PGND and to the exposed pad."
      },
      {
        "number": "13",
        "name": "LED4",
        "type": "input",
        "description": "LED string 4 current input (cathode). Sinks up to 150mA of regulated string current. Headroom VHD ≈ 350mV at 20mA, ≈850mV at 100mA. Absolute max 50V. Tie to GND if unused (auto-detected)."
      },
      {
        "number": "14",
        "name": "LED3",
        "type": "input",
        "description": "LED string 3 current input (cathode). Sinks up to 150mA of regulated string current. Headroom VHD ≈ 350mV at 20mA, ≈850mV at 100mA. Absolute max 50V."
      },
      {
        "number": "15",
        "name": "LED2",
        "type": "input",
        "description": "LED string 2 current input (cathode). Sinks up to 150mA of regulated string current. Headroom VHD ≈ 350mV at 20mA, ≈850mV at 100mA. Absolute max 50V."
      },
      {
        "number": "16",
        "name": "LED1",
        "type": "input",
        "description": "LED string 1 current input (cathode). Sinks up to 150mA of regulated string current. Headroom VHD ≈ 350mV at 20mA, ≈850mV at 100mA. Absolute max 50V."
      },
      {
        "number": "17",
        "name": "PGND",
        "type": "power_in",
        "description": "Step-up converter power ground; source of the internal low-side MOSFET. Route away from logic and connect externally to AGND with a short, low-inductance path."
      },
      {
        "number": "18",
        "name": "SW",
        "type": "power_out",
        "description": "Drain of the internal low-side N-channel MOSFET switch (RDS(ON) ≈ 100mΩ). Connect the boost inductor here. Absolute max 50V (transient -1.0V <100ns)."
      },
      {
        "number": "19",
        "name": "OVP",
        "type": "input",
        "description": "Over-voltage protection sense input. Connect a resistor divider from VOUT to OVP to GND to set the OVP threshold; internal VOVP ≈ 2V (nominal), 200mV hysteresis, 100mV UVLO threshold for VOUT-short detection."
      },
      {
        "number": "20",
        "name": "STH",
        "type": "passive",
        "description": "Short-LED protection threshold set pin, 18μA current source. Connect a resistor to GND: V_STH = 0.18 × R_STH(kΩ); actual threshold is 10 × V_STH. Float to use internal TH_S1:0 register (2.5V/5V/7.5V/10V)."
      },
      {
        "number": "21",
        "name": "ADR",
        "type": "input",
        "description": "I2C slave address select. 18μA pull-up: floating → 0x38, <0.4V → 0x3A, 0.4V-1.4V → 0x39. Program via resistor to GND."
      },
      {
        "number": "22",
        "name": "VCC",
        "type": "power_out",
        "description": "Internal 5V LDO output that powers the internal logic and gate driver. Bypass to AGND with a ceramic capacitor (e.g., 1μF) placed close to the pin. Valid for 6V < VIN < 24V, 0-10mA load."
      },
      {
        "number": "23",
        "name": "SD",
        "type": "output",
        "description": "Gate drive for an optional external disconnect P-channel MOSFET between VIN and VOUT path. Turns off the external PMOS when a fault occurs (VIN − VSD ≈ 6V clamp; 60μA pull-down current). Float if unused."
      },
      {
        "number": "24",
        "name": "VIN",
        "type": "power_in",
        "description": "Power supply input to the IC. Operating range 3.5V to 36V (absolute max 42V). UVLO rising threshold ≈ 3.1V with 100mV hysteresis. Bypass to PGND with a low-ESR ceramic (e.g., 10μF)."
      },
      {
        "number": "EP",
        "name": "AGND",
        "type": "power_in",
        "description": "Exposed thermal pad on the bottom of the QFN. Connect to AGND with multiple vias for electrical reference and heat sinking (θJA = 42°C/W on JESD51-7 4-layer PCB)."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590922716013158400",
        "pages": null,
        "sha256": "2d17e143ea0f3bae",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 25,
        "described": 25,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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      "footprint": "viewers/footprint.html"
    },
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        "file": "mp3364gr-z.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
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        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f7d256794c4147daf24dcae0554fae18510315e565ad1e239b475be7fef80d8b",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "mp3364gr-z-etched.step",
        "role": "eda",
        "up": "Z",
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        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Monolithic Power Systems",
      "Package": "QFN-24(4x4)",
      "Category": "LED Drivers",
      "Pins": "25"
    }
  },
  "variants": [
    {
      "mpn": "MP3364GR-Z",
      "kind": "packaging"
    }
  ],
  "sections": [
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    "readme",
    "breadcrumbs",
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  "discovery_triggers": [
    "mp3364gr-z"
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  "discovery_pitch": "MP3364GR-Z (Monolithic Power Systems) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
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    "path": "docs/hero.png"
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    "mp3364gr-z.lbr",
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  "visibility": {
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  "updated_at": "2026-09-25T02:19:11.126Z"
}