component
MP3184-G
Public Made by Adomby adom
miracle Gate Drive Optocoupler, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| mp3184-g-etched.step | 1d ago |
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| README.md | 1d ago |
MP3184-G
miracle · Gate Drive Optocoupler · DIP-8
MP3184-G from miracle, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection. |
| 2 | ANODE | input | LED anode; drive with IF(ON) of 10 to 16 mA (absolute maximum IF 25 mA, peak 50 mA) and reverse voltage limited to 5 V. |
| 3 | CATHODE | input | LED cathode; input return, with VF(OFF) recommended between -3.0 V and 0.8 V to hold the output low. |
| 4 | NC | unconnected | No internal connection. |
| 5 | VSS | power_in | Output-side negative supply/ground; VDD-VSS must be 15 V to 30 V recommended, 35 V absolute maximum. |
| 6 | VO1 | output | Gate drive output (NMOS/PMOS stage common node) with peak output current up to 3.0 A (max pulse width 10 µs) and rail-to-rail swing. |
| 7 | VO2 | output | Gate drive output tied to the PMOS stage, with peak output current up to 3.0 A (max pulse width 10 µs). |
| 8 | VDD | power_in | Output-side positive supply; 15 V to 30 V recommended, 35 V absolute maximum VDD-VSS, with UVLO turn-on threshold 12.5 V typ. and turn-off 11 V typ. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | miracle |
| Package | DIP-8 |
| Category | Optoisolators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Forward Current | IF | 25 | mA | 2 | |||
| Peak Forward Current | IFP | 50 | mA | ≤1μs P.W, 300pps | 2 | ||
| Input Signal Rise and Fall Time | TR(IN)/TF(IN) | 500 | ns | 2 | |||
| Reverse Voltage | VR | 5 | V | 2 | |||
| Input Power Dissipation | PI | 45 | mW | 2 | |||
| Supply Voltage | VDD-VSS | 35 | V | 2 | |||
| High Peak Output Current | IOH(PEAK) | 3 | A | Maximum pulse width = 10μs | 2 | ||
| Low Peak Output Current | IOL(PEAK) | 3 | A | Maximum pulse width = 10μs | 2 | ||
| Output Power Dissipation | PO | 250 | mW | 2 | |||
| Total Power Dissipation | Ptot | 295 | mW | 2 | |||
| Isolation Voltage | Viso | 5000 | Vrms | AC for 1 minute, R.H. = 40 ~ 60% | 2 | ||
| Operating Temperature | Topr | -40 | 110 | °C | 2 | ||
| Storage Temperature | Tstg | -55 | 125 | °C | 2 | ||
| Soldering Temperature | Tsol | 260 | °C | For 10 seconds | 2 | ||
| Operating Temperature | TA | -40 | 100 | °C | 3 | ||
| Supply Voltage | VDD-VSS | 15 | 30 | V | 3 | ||
| Input Current (ON) | IF(ON) | 10 | 16 | mA | 3 | ||
| Input Voltage (OFF) | VF(OFF) | -3 | 0.8 | V | 3 | ||
| Forward Voltage | VF | 1.1 | 1.3 | 1.8 | V | IF=10mA | 3 |
| Reverse Current | IR | 10 | μA | VR=5V | 3 | ||
| Reverse Breakdown Voltage | BVR | 5 | V | IR=10μA | 3 | ||
| Input Threshold Current | IFLH | 2.6 | 7.5 | mA | IO= 0mA, VO> 5V | 3 | |
| Input Threshold Voltage | VFHL | 0.8 | 1.3 | V | IO= 0mA, VO< 5V | 3 | |
| High Level Supply Current | IDDH | 1.7 | 3.5 | mA | IF=10mA, VO= Open | 3 | |
| Low Level Supply Current | IDDL | 2 | 3.5 | mA | VF=0.8V, VO= Open | 3 | |
| Low Level Output Voltage | VOL | 0.06 | 0.5 | V | IF= 0mA, IO= 100mA | 3 | |
| High Level Output Current | IOH | -1.1 | -0.5 | A | VO= VDD-VSS-1V | 3 | |
| High Level Output Current | IOH | -2.5 | A | VO= VDD-VSS-6V | 3 | ||
| Low Level Output Current | IOL | 0.5 | 1.4 | A | VO= VDD-VSS+1V | 3 | |
| Low Level Output Current | IOL | 2.5 | A | VO= VDD-VSS+6V | 3 | ||
| UVLO Positive Threshold | VUVLO+ | 11.5 | 12.5 | 13.5 | V | IF= 10mA, VO> 5V | 3 |
| UVLO Negative Threshold | VUVLO- | 10 | 11 | 12 | V | IF= 10mA, VO< 5V | 3 |
| Input Capacitance | Cin | 25 | pF | VF=0, f=1MHz | 3 | ||
| UVLO Hysteresis | UVLOHYST | 1.5 | V | 3 | |||
| Propagation Delay Time to Output Low Level | TPHL | 50 | 94 | 210 | ns | IF=10mA,Cg= 10nF, Rg= 10Ω, f= 250kHz, Duty = 50% | 4 |
| Propagation Delay Time to Output High Level | TPLH | 50 | 62 | 210 | ns | IF=10mA,Cg= 10nF, Rg= 10Ω, f= 250kHz, Duty = 50% | 4 |
| Propagation Delay Difference Between Any Two Parts | PDD | -90 | 90 | ns | IF=10mA,Cg= 10nF, Rg= 10Ω, f= 250kHz, Duty = 50% | 4 | |
| Common Mode Transient Immunity at Logic High | /CMH/ | 35 | 50 | kV/μs | IF=10mA, VDD=30V, VCM=2kV | 4 | |
| Common Mode Transient Immunity at Logic Low | /CML/ | 35 | 50 | kV/μs | VF=0V, VDD=30V, VCM=2kV | 4 | |
| Pulse Width Distortion | PWD | 32 | ns | IF=10mA,Cg= 10nF, Rg= 10Ω, f= 250kHz, Duty = 50% | 4 | ||
| Rise Time | tr | 30 | ns | IF=10mA,Cg= 10nF, Rg= 10Ω, f= 250kHz, Duty = 50% | 4 | ||
| Fall Time | tf | 20 | ns | IF=10mA,Cg= 10nF, Rg= 10Ω, f= 250kHz, Duty = 50% | 4 | ||
| UVLO Turn On Delay | tUVLO+ | 2 | μs | IF= 10mA, VO> 5V | 4 | ||
| UVLO Turn Off Delay | tUVLO- | 0.3 | μs | IF= 10mA, VO< 5V | 4 |
CAD (KiCad official)
- Symbol:
MP3184-G - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
mp3184-g-etched.step/mp3184-g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp3184-g.step/mp3184-g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: miracle datasheet (21 pp, sha256
25ba9cfb06cf742e, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).