component
MP2908AGF-Z
Public Made by Adomby adom
Monolithic Power Systems DC-DC Converters, TSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMP2908AGF-Z
Monolithic Power Systems · DC-DC Converters · TSSOP-20-EP
MP2908AGF-Z from Monolithic Power Systems, in a TSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input supply operating from 4V to 60V, requiring a ceramic capacitor to prevent large voltage spikes at the input. |
| 2 | EN/SYNC | input | Enable input with 1.22V threshold and 140mV hysteresis for external UVLO, and the internal clock follows an external sync clock applied here. |
| 3 | VCC2 | power_in | External power supply for the internal VCC1 regulator, which disables power from VIN when above 4.5V; do not connect a supply greater than 12V. |
| 4 | VCC1 | power_out | Internal bias supply to be decoupled with a ceramic capacitor of 1µF or greater and no more than 4.7µF. |
| 5 | SGND | power_in | Low-noise ground reference that should be connected to the VOUT side of the output capacitors. |
| 6 | SS | passive | Soft-start control input that programs the soft-start period with an external capacitor between SS and SGND. |
| 7 | COMP | output | Loop compensation pin where an RC network to GND compensates the regulation control loop. |
| 8 | FB | input | Error amplifier feedback input, where an external resistive divider from the output is compared to the internal 0.8V reference to set the regulation voltage. |
| 9 | CCM/AAM | input | Mode select: floating or tied to VCC1 sets CCM, while an external resistor to GND sets AAM, with the AAM voltage no less than 480mV. |
| 10 | FREQ | passive | Connect a resistor between FREQ and GND to set the switching frequency. |
| 11 | PG | output | Power good output, which is open drain. |
| 12 | ILIM | input | Sense voltage limit set, with three fixed options (float, VCC1, GND) setting the nominal sense voltage at maximum output current. |
| 13 | SYNCO | output | Outputs a 180º out-of-phase clock when the part works in CCM for dual-channel operation. |
| 14 | SENSE- | input | Negative current-sense input, with the inductor current limit threshold determined by the ILIM status. |
| 15 | SENSE+ | input | Positive current-sense input, with the inductor current limit threshold determined by the ILIM status. |
| 16 | PGND | power_in | High-current ground reference for the internal low-side driver and VCC1 regulator, connected directly to the negative terminal of the VCC1 decoupling capacitor. |
| 17 | BG | output | Bottom gate driver output that connects to the gate of the synchronous N-channel MOSFET. |
| 18 | SW | passive | Switch node that is the reference for the VBST supply and the high-current return for the bootstrapped switch. |
| 19 | TG | output | Top gate drive for the top N-channel MOSFET, powered from the BST capacitor and returning to SW for floating drive. |
| 20 | BST | power_in | Bootstrap positive supply for the floating high-side MOSFET driver, with a bypass capacitor between BST and SW and a diode from VCC1. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | TSSOP-20-EP |
| Category | Power Management ICs |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input supply voltage | VIN | 65 | V | 3 | |||
| SW voltage | SW | -0.3 | 65 | V | 3 | ||
| BST - SW | 6.5 | V | 3 | ||||
| Supply voltage VCC1 | VCC1 | 6.5 | V | 3 | |||
| External supply voltage VCC2 | VCC2 | 15 | V | 3 | |||
| SENSE+/- | 28 | V | 3 | ||||
| Differential sense | -0.7 | 0.7 | V | SENSE+ to SENSE- | 3 | ||
| All other pins | -0.3 | 6.5 | V | 3 | |||
| Continuous power dissipation TSSOP-20 EP | 3.1 | W | TA = +25°C | 3 | |||
| Storage temperature | -65 | 175 | °C | 3 | |||
| Supply voltage | VIN | 4 | 60 | V | 3 | ||
| Output voltage | VOUT | 24 | V | 3 | |||
| Supply voltage for VCC2 | VCC2 | 4.5 | 12 | V | 3 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 3 | ||
| Thermal resistance junction-ambient TSSOP-20 EP | θJA | 40 | °C/W | JESD51-7, 4-layer PCB | 3 | ||
| Thermal resistance junction-case TSSOP-20 EP | θJC | 8 | °C/W | JESD51-7, 4-layer PCB | 3 | ||
| VIN UVLO threshold (rising) | INUV_RISING | 4.5 | 5 | V | VIN = 24V, TJ = +25°C | 4 | |
| VIN UVLO threshold (falling) | INUV_FALLING | 3.7 | 3.95 | V | 4 | ||
| VIN UVLO hysteresis | INUV_HYS | 800 | mV | 4 | |||
| VIN supply current with VCC2 bias | IQ_VCC2 | 25 | 40 | μA | VCC2 = 12V, external bias | 4 | |
| VIN supply current without VCC2 bias | IQ | 750 | 1000 | μA | VCC2 = 0, VFB = 0.84V, VAAM = 5V, SENSE+ = SENSE- = 0.3V | 4 | |
| VIN AAM current | IQ_AAM | 250 | 350 | μA | VAAM=0.6V, VFB=0.84V, SENSE+ = SENSE- = 0.3V | 4 | |
| VIN shutdown current | ISHDN | 0.5 | 1.5 | μA | VEN = 0V | 4 | |
| VCC1 regulator output voltage from VIN | VCC1_VIN | 5 | V | VIN > 6V | 4 | ||
| VCC1 load regulation from VIN | 1 | 3 | % | Load = 0 to 50mA, VCC2 floating or connects to GND | 4 | ||
| VCC1 regulator output voltage from VCC2 | VCC1_VCC2 | 5 | V | VCC2 > 6V | 4 | ||
| VCC1 load regulation from VCC2 | 1 | 3 | % | Load = 0 to 50mA, VCC2 = 12V | 4 | ||
| VCC2 UVLO threshold (rising) | VCC2_RISING | 4.7 | 4.92 | V | 4 | ||
| VCC2 UVLO threshold (falling) | VCC2_FALLING | 4.45 | V | 4 | |||
| VCC2 threshold hysteresis | VCC2_HYS | 250 | mV | 4 | |||
| VCC2 supply current (VAAM = 5V) | IVCC2 | 800 | μA | VAAM = 5V, VFB = 0.84V, VCC2 = 12V | 4 | ||
| VCC2 supply current (VAAM = 0.6V) | IVCC2 | 200 | μA | VAAM = 0.6V, VFB = 0.84V, VCC2 = 12V | 4 | ||
| Feedback voltage | VFB | 0.788 | 0.8 | 0.812 | V | 4V ≤ VIN ≤ 60V | 4 |
| Feedback current | IFB | 10 | nA | VFB = 0.8V | 4 | ||
| Enable threshold (rising) | VEN_RISING | 1.16 | 1.22 | 1.28 | V | 4 | |
| Enable threshold (falling) | VEN_FALLING | 1.03 | 1.09 | 1.15 | V | 4 | |
| Enable threshold hysteresis | VEN_TH | 130 | mV | 4 | |||
| EN input current | IEN | 2 | μA | VEN = 2V | 4 | ||
| Enable turn-off delay | TOFF | 10 | 15 | μs | 4 | ||
| Operating frequency | FSW | 240 | 300 | 360 | kHz | RFreq = 65kΩ | 5 |
| Foldback operating frequency | FSW_FOLDBACK | 50 | % FSW | VFB=0.1V | 5 | ||
| Maximum programmable frequency | FSWH | 1000 | kHz | 5 | |||
| Minimum programmable frequency | FSWL | 100 | kHz | 5 | |||
| Sync/EN frequency range | FSYNC | 100 | 1000 | kHz | 5 | ||
| Current sense common mode voltage range | VSENSE+/- | 0 | 24 | V | 5 | ||
| Current limit sense voltage (ILIM = GND) | VILIMIT | 15 | 25 | 35 | mV | ILIM = GND, VSENSE+ = 3.3V | 5 |
| Current limit sense voltage (ILIM = VCC1) | VILIMIT | 40 | 50 | 60 | mV | ILIM = VCC1, VSENSE+ = 3.3V | 5 |
| Current limit sense voltage (ILIM = FLOAT) | VILIMIT | 65 | 75 | 85 | mV | ILIM = FLOAT, VSENSE+ = 3.3V | 5 |
| Soft-start source current | ISS | 2 | 4 | 6 | μA | SS = 0.5V | 5 |
| Over-voltage threshold | VOV | 110 | 115 | 120 | % VFB | 5 | |
| TG maximum duty cycle | Dmax | 98 | 99.5 | % | VFB = 0.7V | 6 | |
| BG minimum on time | TON_MIN_BG | 175 | 250 | ns | 6 | ||
| Power good low | VPG_Low | 0.1 | 0.3 | V | Iload = 4mA | 6 | |
| Power good leakage | IPG_LK | 2 | μA | PG = 5V | 6 | ||
| Dead time | TDead | 60 | ns | CLoad = 3.3nF | 6 | ||
| Operating junction temperature range | TJ | -40 | 125 | °C | 3 |
CAD (KiCad official)
- Symbol:
MP2908AGF-Z - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: TSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
mp2908agf-z-etched.step/mp2908agf-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp2908agf-z.step/mp2908agf-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (22 pp, sha256
c64fea367abe0330, retrieved 2026-10-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).