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MP28167GQ-A-Z

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Monolithic Power Systems DC-DC Converters, QFN-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MP28167GQ-A-Z

Monolithic Power Systems · DC-DC Converters · QFN-16(3x3)

MP28167GQ-A-Z from Monolithic Power Systems, in a QFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Supply voltage input for the internal power device and the entire chip, operating from 2.8V to 22V, with a capacitor CIN placed as close to the IC as possible to limit voltage spikes.
2 GND power_in Power ground and reference ground for the regulated output, requiring extra PCB layout care with copper traces and vias.
3 EN input On/off control for the entire chip: drive high to turn on, drive low or float to turn off, with an internal 2MΩ pull-down to ground.
4 ALT output Alert output that pulls to logic low when a fault or warning has occurred.
5 SCL input I2C clock pin supporting clock frequencies up to 3.4MHz; pull up to VCC if not used.
6 SDA bidirectional I2C data pin; pull up to VCC if not used.
7 OC input Output constant-current limit set pin.
8 FB input Feedback pin that sets the output voltage when connected to the tap of an external resistor divider between output and GND.
9 VCC power_out Internal 3.65V LDO regulator output that must be decoupled with a 1µF capacitor.
10 AGND power_in Analog ground that must be connected to GND.
11 GND power_in Power ground and reference ground for the regulated output, requiring extra PCB layout care with copper traces and vias.
12 OUT power_out Output power pin; the output capacitor must be placed close to OUT and GND.
13 BST2 passive Bootstrap pin; a 0.1µF capacitor connected between SW2 and BST2 forms the floating supply for the high-side switch driver.
14 SW2 passive Switching node of the second half bridge; one end of the inductor connects to SW2 to carry the bridge current.
15 SW1 passive Switching node of the first half bridge; one end of the inductor connects to SW1 to carry the bridge current.
16 BST1 passive Bootstrap pin; a 0.1µF capacitor connected between SW1 and BST1 forms the floating supply for the high-side switch driver.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Monolithic Power Systems
Package QFN-16(3x3)
Category Power Management (PMIC)
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
EN rising threshold VEN_RISING 1 1.1 1.2 V 7
VCC regulator VCC 3.3 3.65 4 V 7
VIN under-voltage lockout rising threshold VIN_UVLO 2.5 2.65 2.8 V 7
HS switch on resistance RDSON_HS 25 40 mΩ Switch A, D 7
LS switch on resistance RDSON_LSB 21 35 mΩ Switch B, C 7
Feedback voltage tolerance (nominal 1000 mV) VFB -1 1 % TJ = 25°C 7
Feedback voltage tolerance (nominal 1000 mV) VFB -1.5 1.5 % TJ = -40°C to +125°C 7
Output discharge resistance RDIS 60 100 Ω 7
Oscillator frequency tolerance (printed nominal 520 kHz) fS1 -20 20 % Set FREQ = 500kHz by I2C, TJ = 25°C 7
Output over-voltage protection VOVP_R 150 160 170 % VREF 7
Output OVP recovery VOVP_F 130 140 150 % VREF 7
Low-side B valley limit ILIMIT2 6 8 10 A Switch B 7
Output average current IOUT_LIM1 0.85 1 1.15 A VOUT = 5V, across 0°C to 125°C temp range 8
Output average current tolerance (printed nominal 3.5 A) IOUT_LIM2 -5 5 % VOUT = 5V, across 0°C to 125°C temp range 8
Output UV threshold VUVP 45 50 55 % VREF 20µs deglitch, UV falling 8
ALT sink current capability low voltage ALT_LOW 0.2 0.4 V Sink 4mA 8
Data hold time tHD_DAT 0 60 ns 8
SCL and SDA rising time tR 10 300 ns 8
SCL and SDA falling time tF 10 300 ns 8
Pulse width of suppressed spike tSP 0 50 ns 8
SCL clock frequency fSCL 400 3400 kHz 8
Shutdown supply current IIN 0 3 μA VEN = 0V 7
Supply voltage (VIN) VIN 26 V 6
VOUT VOUT 24 V 6
VSW1, SW2 (DC) VSW1, SW2 -0.3 24.3 V DC 6
VSW1, SW2 (10ns) VSW1, SW2 -7 26 V 10ns 6
EN voltage VEN -0.3 26 V 6
ALT voltage VALT -0.3 5.5 V 6
All other pins voltage -0.3 4 V 6
Continuous power dissipation 4.8 W TA = 25°C 6
Junction temperature 150 °C 6
Storage temperature -65 150 °C 6
ESD HBM -2 2 kV All pins (HBM), JESD22-A114 6
ESD CDM -2 2 kV All pins (CDM), JESD22-C101 6
Operation input voltage range VIN 2.8 22 V 6
Output voltage range VOUT 1 20.47 V 6
Output current IOUT 3 A Continuous current 6
Input current IIN 4 A Input current 6
Operating junction temperature TJ -40 125 °C 6
Thermal resistance junction-to-ambient θJA 26 °C/W EV28167-A-Q-00A, 4-layer PCB, 64mmx64mm 6
Thermal resistance junction-to-case θJC 3 °C/W EV28167-A-Q-00A, 4-layer PCB, 64mmx64mm 6
Thermal resistance junction-to-ambient (JEDEC) θJA 50 °C/W JESD51-7, 4-layer PCB 6
Thermal resistance junction-to-case (JEDEC) θJC 12 °C/W JESD51-7, 4-layer PCB 6
EN hysteresis VEN_HYS 110 mV 7
EN to ground resistance REN 2 MΩ VEN = 2V 7
EN on to VOUT > 90% delay tDELAY 3.6 ms See Figure 7 on page 19 7
VCC load regulation VCC_LOG 1 % ICC = 10mA 7
VIN under-voltage lockout threshold hysteresis VUVLO_HYS 160 mV 7
Quiescent supply current IQ 1 mA Non-switching, I2C sets PFM mode 7
Switch leakage SWLKG 1 μA VEN = 0V, VSW1, SW2 = 22V, TJ = 25°C 7
Low-side C peak current limit ILIMIT3 10 A Switch C 7
Maximum duty cycle DMAX 85 % Buck mode, FREQ = 500kHz 7
Minimum duty cycle DMIN 15 % Boost mode, FREQ = 500kHz 7
Soft-start time tSS 3.5 ms Can be changed by I2C, VREF from 0V to 1V, default SS time 7
Oscillator frequency fS2 750 kHz Set FREQ = 750kHz by I2C, TJ = 25°C 7
Minimum on time tON_MIN1 160 ns Switch A, B, C, D 7
Thermal shutdown rising threshold TSTD 150 °C 8
SCL high time tHIGH 60 ns 8
SCL low time tLOW 160 ns 8

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper close to the IC’s VIN-to-GND and OUT-to￾GND pins, respectively. 2. Use a large copper plane for PGND. 29

CAD (KiCad official)

  • Symbol: MP28167GQ-A-Z
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16(3x3) (KiCad packages3D, STEP)
  • 3D model files: mp28167gq-a-z-etched.step / mp28167gq-a-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mp28167gq-a-z.step / mp28167gq-a-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Monolithic Power Systems datasheet (32 pp, sha256 a6258b8fbdb1f771, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF