component
MP2617BGL-Z
Public Made by Adomby adom
MONOLITHIC POWER SYSTEMS Global Sourcing Parts, QFN-20(3x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MP2617BGL-Z
MONOLITHIC POWER SYSTEMS · Global Sourcing Parts · QFN-20(3x4)
MP2617BGL-Z from MONOLITHIC POWER SYSTEMS, in a QFN-20(3x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST | passive | Bootstrap pin; a capacitor between SW and BST forms a floating supply for the power switch gate driver (BST rated -0.3V to +26V). |
| 2 | SW | power_out | Switch output of the synchronous buck regulator (rated -0.3V to +20V). |
| 3 | IN | power_in | Power input of the IC from adapter or USB; operating range 4.0V to 10V, rated -0.3V to +20V. |
| 4 | SW | power_out | Switch output of the synchronous buck regulator (rated -0.3V to +20V). |
| 5 | PGND | power_in | Power ground. |
| 6 | EN | input | Active-low logic enable: logic low enables the part and logic high disables it (low <0.4V, high >1.5V). |
| 7 | M0 | input | Mode select input that, combined with M1, sets the input current limit mode (logic high 1.5V min, low 0.4V max). |
| 8 | M1 | input | Mode select input that, combined with M0, sets the input current limit mode (logic high 1.5V min, low 0.4V max). |
| 9 | CHGOK | output | Open-drain output pulled low during charging and pulled high through an external resistor to VCC when charge is complete (low voltage 270mV typ at 5mA sink). |
| 10 | ACOK | output | Open-drain output pulled low to indicate a valid input supply, otherwise pulled high through an external resistor to VCC (low voltage 270mV typ at 5mA sink). |
| 11 | AGND | power_in | Analog ground. |
| 12 | SYSFB | input | SYS voltage program pin; connect a resistor divider from SYS to AGND to program the system output voltage, or leave floating to disable the function. |
| 13 | SYS | power_out | DC-DC regulator output that powers the system load and charges the battery (rated -0.3V to +6V). |
| 14 | BATT | bidirectional | Positive battery terminal (rated -0.3V to +6V); MP2617B terminal charge voltage is 4.2V typ. |
| 15 | ISET | passive | Charge current program pin; a resistor to AGND sets the CC charge current (e.g. 1.53k gives 1.4A typ), and floating the pin disables charging. |
| 16 | NTC | input | Thermistor input; connect a resistor from this pin to VCC and the thermistor (usually in the battery pack) from this pin to ground. |
| 17 | ILIM | passive | Input current limit program pin; a resistor to AGND sets the input current limit with adapter input. |
| 18 | TMR | passive | Sets the charge timer period with a capacitor; connect TMR to AGND to disable the internal timer. |
| 19 | VLIM | passive | Input voltage clamp program pin. |
| 20 | VCC | power_out | Supply voltage of the IC, with 4.5V typ output voltage and 40mA typ output current limit. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MONOLITHIC POWER SYSTEMS |
| Package | QFN-20(3x4) |
| Category | Global Sourcing Parts |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| IN Operating Range | VIN | 4 | 10 | V | 6 | ||
| IN UVLO Threshold Rising | 3.65 | 3.8 | 3.95 | V | Rising | 6 | |
| IN UVLO Threshold Falling | 3.35 | 3.5 | 3.65 | V | Falling | 6 | |
| IN vs. BATT Threshold Rising | 240 | 280 | 320 | mV | Rising | 6 | |
| IN vs. BATT Threshold Falling | 40 | 70 | 120 | mV | Falling | 6 | |
| BST Voltage Threshold Rising | VBST-VSW | 2.55 | 2.9 | 3.25 | V | Rising | 6 |
| Switching Frequency | 1.4 | 1.6 | 1.8 | MHz | 6 | ||
| Input Current Limit USB2.0 Mode | IIN | 400 | 450 | 500 | mA | USB2.0 Mode | 6 |
| Input Current Limit USB3.0 Mode | IIN | 750 | 825 | 900 | mA | USB3.0 Mode | 6 |
| Input Current Limit Default Mode | IIN | 1840 | 2000 | 2160 | mA | Default Mode | 6 |
| Input Current Limit Programmable Mode | IIN | 1840 | 2000 | 2160 | mA | Programmable Mode, RILIM=23k (MP2617B) | 6 |
| Input Current Limit Reference Voltage | VILIM | 1.1 | 1.14 | 1.18 | V | 6 | |
| High-side NMOS On Resistance | RH_DS(ON) | 120 | 130 | mΩ | Include the BLOCK FET | 6 | |
| Low-side NMOS On Resistance | RL_DS(ON) | 80 | 100 | mΩ | 6 | ||
| High-side NMOS Peak Current Limit | 3.8 | 4.8 | 5.8 | A | 6 | ||
| Input Voltage Clamp Threshold | VVLIM | 1.49 | 1.52 | 1.55 | V | Voltage on VLIM | 6 |
| Input Quiescent Current USB2.0 | IIN | 2.4 | 5 | mA | Charger Enabled, USB2.0 Mode | 6 | |
| Input Quiescent Current USB3.0 | IIN | 2.8 | 5 | mA | Charger Enabled, USB3.0 Mode | 6 | |
| Input Quiescent Current Programmable | IIN | 3.8 | 5 | mA | Charger Enable, Programmable Mode | 6 | |
| Input Quiescent Current Default | IIN | 3.8 | 5 | mA | Charger Enabled, Default Mode | 6 | |
| Input Quiescent Current Disabled | IIN | 3 | 5 | uA | Disabled, EN=0V | 6 | |
| SYS to IN Reverse Current Blocking | 0.01 | 0.2 | uA | SYS=SW=4.5V,VIN=0V, monitor VIN leakage | 6 | ||
| Minimum SYS Regulation Voltage | VSYS | 3.45 | 3.6 | 3.75 | V | SYS voltage @ VBATT≤3.4V, SYSFB float | 7 |
| SYS Regulation Voltage | VSYS | 3.5 | 4.5 | V | 3.4V<VBATT≤4.2V, SYSFB float BATT Float | 7 | |
| SYS Regulation Voltage User Programmed | VSYS | 4.08 | 4.4 | V | User Programmed by SYSFB | 7 | |
| SYS Reference Voltage | VSYS_REF | 1.135 | 1.152 | 1.17 | V | 7 | |
| BATT to SYS Resistance | 40 | 50 | mΩ | VIN=0V, ISYS=200mA, VBATT=4.2V | 7 | ||
| BATT to SYS Current Limit | 4 | 5 | 6 | A | VSYS>VBATT-800mV, VBATT=4.2V | 7 | |
| BATT to SYS Current Limit SYS short | 230 | mA | SYS short | 7 | |||
| Terminal Battery Voltage | VBATT | 4.179 | 4.2 | 4.221 | V | VBATT>VRECH, ICHG≤IBF, SYSFB float | 7 |
| Recharge Threshold at VBATT, SYSFB Float | VRECH | 3.9 | 4 | 4.1 | V | SYSFB Float | 7 |
| Recharge Threshold at VBATT, SYSFB programmed | VRECH | 3.85 | 3.95 | 4.05 | V | SYSFB programmed | 7 |
| Recharge Hysteresis | 85 | mV | 7 | ||||
| Trickle Charge Threshold | 2.9 | 3 | 3.1 | V | 7 | ||
| Trickle Charger Hysteresis | 200 | mV | 7 | ||||
| Trickle Charge Current | ITRICKLE | 10 | % ICC | 7 | |||
| Termination Charger Current | IBF | 5 | 10 | 15 | % ICC | 7 | |
| IBF Maximum Limit | 150 | 200 | mA | 7 | |||
| Constant Current Mode Charge Current | ICC | 1.26 | 1.4 | 1.54 | A | RISET=1.53k | 7 |
| Constant Current Mode Charge Current | ICC | 0.405 | 0.45 | 0.495 | A | RISET=4.6k | 7 |
| ISET Reference Voltage | 1.1 | 1.15 | 1.2 | V | 8 | ||
| Battery UVLO Rising | 2.4 | 2.6 | 2.8 | V | Rising | 8 | |
| Battery UVLO Falling | 2.2 | 2.4 | 2.6 | V | Falling | 8 | |
| BATT Leakage Current | IBATT | 20 | 30 | µA | VBATT=4.2V, SYS float, VIN=PGND | 8 | |
| ACOK, CHGOK Pin Output Low Voltage | 270 | 350 | mV | Sinking 5mA | 8 | ||
| ACOK, CHGOK Pin Leakage Current | 0.1 | 0.5 | μA | Connected to 3.3V | 8 | ||
| NTC Low Temp Rising Threshold | VTHL | 63 | 65 | 67 | %VCC | RNTC=NCP18XH103F 0°C | 8 |
| NTC High Temp Falling Threshold | VTHH | 32 | 33.5 | 35 | %VCC | RNTC=NCP18XH103F, 50°C | 8 |
| VCC UVLO Rising | 3.15 | 3.35 | 3.55 | V | Rising | 8 | |
| VCC UVLO Falling | 2.8 | 3 | 3.2 | V | Falling | 8 | |
| VCC Output Voltage | 4.3 | 4.5 | 4.6 | V | 0mA<IVCC<25mA, VIN=6V | 8 | |
| EN Input Low Voltage | 0.4 | V | 8 | ||||
| EN Input High Voltage | 1.5 | V | 8 | ||||
| EN Input Current | 4 | 8 | μA | EN =4V | 8 | ||
| EN Input Current | -0.5 | -0.1 | μA | EN =0V | 8 | ||
| M0, M1 Logic High | 1.5 | V | 8 | ||||
| M0, M1 Logic Low | 0.4 | V | 8 | ||||
| IN, SW Voltage | -0.3 | 20 | V | 5 | |||
| BATT, SYS Voltage | -0.3 | 6 | V | 5 | |||
| BST Voltage | -0.3 | 26 | V | 5 | |||
| All Other Pins Voltage | -0.3 | 6 | V | 5 | |||
| Continuous Power Dissipation | 2.6 | W | TA = +25°C, QFN20 3mmx4mm | 5 | |||
| Junction Temperature | TJ | 150 | °C | 5 | |||
| Storage Temperature | -65 | 150 | °C | 5 | |||
| Recommended Operating Junction Temperature | TJ | -40 | 125 | °C | 5 |
CAD (KiCad official)
- Symbol:
MP2617BGL-Z - Footprint:
Package_DFN_QFN:QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm - 3D model: QFN-20(3x4) (KiCad packages3D, STEP)
- 3D model files:
mp2617bgl-z-etched.step/mp2617bgl-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp2617bgl-z.step/mp2617bgl-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MONOLITHIC POWER SYSTEMS datasheet (32 pp, sha256
b2d6b325ca63f41f, retrieved 2026-10-31, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MP2617BGL-Z
**MONOLITHIC POWER SYSTEMS** · Global Sourcing Parts · QFN-20(3x4)
MP2617BGL-Z from MONOLITHIC POWER SYSTEMS, in a QFN-20(3x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST | passive | Bootstrap pin; a capacitor between SW and BST forms a floating supply for the power switch gate driver (BST rated -0.3V to +26V). |
| 2 | SW | power_out | Switch output of the synchronous buck regulator (rated -0.3V to +20V). |
| 3 | IN | power_in | Power input of the IC from adapter or USB; operating range 4.0V to 10V, rated -0.3V to +20V. |
| 4 | SW | power_out | Switch output of the synchronous buck regulator (rated -0.3V to +20V). |
| 5 | PGND | power_in | Power ground. |
| 6 | EN | input | Active-low logic enable: logic low enables the part and logic high disables it (low <0.4V, high >1.5V). |
| 7 | M0 | input | Mode select input that, combined with M1, sets the input current limit mode (logic high 1.5V min, low 0.4V max). |
| 8 | M1 | input | Mode select input that, combined with M0, sets the input current limit mode (logic high 1.5V min, low 0.4V max). |
| 9 | CHGOK | output | Open-drain output pulled low during charging and pulled high through an external resistor to VCC when charge is complete (low voltage 270mV typ at 5mA sink). |
| 10 | ACOK | output | Open-drain output pulled low to indicate a valid input supply, otherwise pulled high through an external resistor to VCC (low voltage 270mV typ at 5mA sink). |
| 11 | AGND | power_in | Analog ground. |
| 12 | SYSFB | input | SYS voltage program pin; connect a resistor divider from SYS to AGND to program the system output voltage, or leave floating to disable the function. |
| 13 | SYS | power_out | DC-DC regulator output that powers the system load and charges the battery (rated -0.3V to +6V). |
| 14 | BATT | bidirectional | Positive battery terminal (rated -0.3V to +6V); MP2617B terminal charge voltage is 4.2V typ. |
| 15 | ISET | passive | Charge current program pin; a resistor to AGND sets the CC charge current (e.g. 1.53k gives 1.4A typ), and floating the pin disables charging. |
| 16 | NTC | input | Thermistor input; connect a resistor from this pin to VCC and the thermistor (usually in the battery pack) from this pin to ground. |
| 17 | ILIM | passive | Input current limit program pin; a resistor to AGND sets the input current limit with adapter input. |
| 18 | TMR | passive | Sets the charge timer period with a capacitor; connect TMR to AGND to disable the internal timer. |
| 19 | VLIM | passive | Input voltage clamp program pin. |
| 20 | VCC | power_out | Supply voltage of the IC, with 4.5V typ output voltage and 40mA typ output current limit. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MONOLITHIC POWER SYSTEMS |
| Package | QFN-20(3x4) |
| Category | Global Sourcing Parts |
| Pins | 21 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| IN Operating Range | VIN | 4 | | 10 | V | | 6 |
| IN UVLO Threshold Rising | | 3.65 | 3.8 | 3.95 | V | Rising | 6 |
| IN UVLO Threshold Falling | | 3.35 | 3.5 | 3.65 | V | Falling | 6 |
| IN vs. BATT Threshold Rising | | 240 | 280 | 320 | mV | Rising | 6 |
| IN vs. BATT Threshold Falling | | 40 | 70 | 120 | mV | Falling | 6 |
| BST Voltage Threshold Rising | VBST-VSW | 2.55 | 2.9 | 3.25 | V | Rising | 6 |
| Switching Frequency | | 1.4 | 1.6 | 1.8 | MHz | | 6 |
| Input Current Limit USB2.0 Mode | IIN | 400 | 450 | 500 | mA | USB2.0 Mode | 6 |
| Input Current Limit USB3.0 Mode | IIN | 750 | 825 | 900 | mA | USB3.0 Mode | 6 |
| Input Current Limit Default Mode | IIN | 1840 | 2000 | 2160 | mA | Default Mode | 6 |
| Input Current Limit Programmable Mode | IIN | 1840 | 2000 | 2160 | mA | Programmable Mode, RILIM=23k (MP2617B) | 6 |
| Input Current Limit Reference Voltage | VILIM | 1.1 | 1.14 | 1.18 | V | | 6 |
| High-side NMOS On Resistance | RH_DS(ON) | | 120 | 130 | mΩ | Include the BLOCK FET | 6 |
| Low-side NMOS On Resistance | RL_DS(ON) | | 80 | 100 | mΩ | | 6 |
| High-side NMOS Peak Current Limit | | 3.8 | 4.8 | 5.8 | A | | 6 |
| Input Voltage Clamp Threshold | VVLIM | 1.49 | 1.52 | 1.55 | V | Voltage on VLIM | 6 |
| Input Quiescent Current USB2.0 | IIN | | 2.4 | 5 | mA | Charger Enabled, USB2.0 Mode | 6 |
| Input Quiescent Current USB3.0 | IIN | | 2.8 | 5 | mA | Charger Enabled, USB3.0 Mode | 6 |
| Input Quiescent Current Programmable | IIN | | 3.8 | 5 | mA | Charger Enable, Programmable Mode | 6 |
| Input Quiescent Current Default | IIN | | 3.8 | 5 | mA | Charger Enabled, Default Mode | 6 |
| Input Quiescent Current Disabled | IIN | | 3 | 5 | uA | Disabled, EN=0V | 6 |
| SYS to IN Reverse Current Blocking | | | 0.01 | 0.2 | uA | SYS=SW=4.5V,VIN=0V, monitor VIN leakage | 6 |
| Minimum SYS Regulation Voltage | VSYS | 3.45 | 3.6 | 3.75 | V | SYS voltage @ VBATT≤3.4V, SYSFB float | 7 |
| SYS Regulation Voltage | VSYS | 3.5 | | 4.5 | V | 3.4V<VBATT≤4.2V, SYSFB float BATT Float | 7 |
| SYS Regulation Voltage User Programmed | VSYS | 4.08 | | 4.4 | V | User Programmed by SYSFB | 7 |
| SYS Reference Voltage | VSYS_REF | 1.135 | 1.152 | 1.17 | V | | 7 |
| BATT to SYS Resistance | | | 40 | 50 | mΩ | VIN=0V, ISYS=200mA, VBATT=4.2V | 7 |
| BATT to SYS Current Limit | | 4 | 5 | 6 | A | VSYS>VBATT-800mV, VBATT=4.2V | 7 |
| BATT to SYS Current Limit SYS short | | | 230 | | mA | SYS short | 7 |
| Terminal Battery Voltage | VBATT | 4.179 | 4.2 | 4.221 | V | VBATT>VRECH, ICHG≤IBF, SYSFB float | 7 |
| Recharge Threshold at VBATT, SYSFB Float | VRECH | 3.9 | 4 | 4.1 | V | SYSFB Float | 7 |
| Recharge Threshold at VBATT, SYSFB programmed | VRECH | 3.85 | 3.95 | 4.05 | V | SYSFB programmed | 7 |
| Recharge Hysteresis | | | 85 | | mV | | 7 |
| Trickle Charge Threshold | | 2.9 | 3 | 3.1 | V | | 7 |
| Trickle Charger Hysteresis | | | 200 | | mV | | 7 |
| Trickle Charge Current | ITRICKLE | | 10 | | % ICC | | 7 |
| Termination Charger Current | IBF | 5 | 10 | 15 | % ICC | | 7 |
| IBF Maximum Limit | | | 150 | 200 | mA | | 7 |
| Constant Current Mode Charge Current | ICC | 1.26 | 1.4 | 1.54 | A | RISET=1.53k | 7 |
| Constant Current Mode Charge Current | ICC | 0.405 | 0.45 | 0.495 | A | RISET=4.6k | 7 |
| ISET Reference Voltage | | 1.1 | 1.15 | 1.2 | V | | 8 |
| Battery UVLO Rising | | 2.4 | 2.6 | 2.8 | V | Rising | 8 |
| Battery UVLO Falling | | 2.2 | 2.4 | 2.6 | V | Falling | 8 |
| BATT Leakage Current | IBATT | | 20 | 30 | µA | VBATT=4.2V, SYS float, VIN=PGND | 8 |
| ACOK, CHGOK Pin Output Low Voltage | | | 270 | 350 | mV | Sinking 5mA | 8 |
| ACOK, CHGOK Pin Leakage Current | | | 0.1 | 0.5 | μA | Connected to 3.3V | 8 |
| NTC Low Temp Rising Threshold | VTHL | 63 | 65 | 67 | %VCC | RNTC=NCP18XH103F 0°C | 8 |
| NTC High Temp Falling Threshold | VTHH | 32 | 33.5 | 35 | %VCC | RNTC=NCP18XH103F, 50°C | 8 |
| VCC UVLO Rising | | 3.15 | 3.35 | 3.55 | V | Rising | 8 |
| VCC UVLO Falling | | 2.8 | 3 | 3.2 | V | Falling | 8 |
| VCC Output Voltage | | 4.3 | 4.5 | 4.6 | V | 0mA<IVCC<25mA, VIN=6V | 8 |
| EN Input Low Voltage | | | | 0.4 | V | | 8 |
| EN Input High Voltage | | 1.5 | | | V | | 8 |
| EN Input Current | | | 4 | 8 | μA | EN =4V | 8 |
| EN Input Current | | -0.5 | -0.1 | | μA | EN =0V | 8 |
| M0, M1 Logic High | | 1.5 | | | V | | 8 |
| M0, M1 Logic Low | | | | 0.4 | V | | 8 |
| IN, SW Voltage | | -0.3 | | 20 | V | | 5 |
| BATT, SYS Voltage | | -0.3 | | 6 | V | | 5 |
| BST Voltage | | -0.3 | | 26 | V | | 5 |
| All Other Pins Voltage | | -0.3 | | 6 | V | | 5 |
| Continuous Power Dissipation | | | | 2.6 | W | TA = +25°C, QFN20 3mmx4mm | 5 |
| Junction Temperature | TJ | | | 150 | °C | | 5 |
| Storage Temperature | | -65 | | 150 | °C | | 5 |
| Recommended Operating Junction Temperature | TJ | -40 | | 125 | °C | | 5 |
## CAD (KiCad official)
- Symbol: `MP2617BGL-Z`
- Footprint: `Package_DFN_QFN:QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm`
- 3D model: QFN-20(3x4) (KiCad packages3D, STEP)
- 3D model files: `mp2617bgl-z-etched.step` / `mp2617bgl-z-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mp2617bgl-z.step` / `mp2617bgl-z.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [MONOLITHIC POWER SYSTEMS datasheet](docs/mp2617bgl-z-datasheet.pdf) (32 pp, sha256 `b2d6b325ca63f41f`, retrieved 2026-10-31, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mp2617bgl-z-datasheet.pdf)