component
MP2617AGL-Z
Public Made by Adomby adom
Monolithic Power Systems Battery Management, QFN-20(3x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MP2617AGL-Z
Monolithic Power Systems · Battery Management · QFN-20(3x4)
MP2617AGL-Z from Monolithic Power Systems, in a QFN-20(3x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST | power_out | Bootstrap pin: a capacitor connected between SW and BST forms a floating supply across the power switch driver to drive the power switch gate above the supply voltage. |
| 2 | SW | output | Switch output node of the synchronous buck regulator; one of two SW pins that are bonded together. |
| 3 | IN | power_in | Power input of the IC from adapter or USB, with an operating input range of 4V to 10V. |
| 4 | SW | output | Switch output node of the synchronous buck regulator; one of two SW pins that are bonded together. |
| 5 | PGND | power_in | Power ground of the IC. |
| 6 | EN | input | Function logic control pin: logic low (VIL max 0.4V) enables the part and logic high (VIH min 1.5V) disables it. |
| 7 | M0 | input | Mode select input that, in combination with M1, sets the input current limit mode; logic high min 1.5V and logic low max 0.4V. |
| 8 | M1 | input | Mode select input that, in combination with M0, sets the input current limit mode; logic high min 1.5V and logic low max 0.4V. |
| 9 | CHGOK | output | Open-drain output that is pulled low during charging and pulled high through an external resistor to VCC to indicate charge completed; sinks 5mA with max 350mV low voltage. |
| 10 | ACOK | output | Open-drain output that is pulled low to indicate a valid input power supply, otherwise pulled high through an external resistor to VCC to indicate invalid or removed input; sinks 5mA with max 350mV low voltage. |
| 11 | AGND | power_in | Analog ground of the IC; ISET and ILIM programming resistors and the TMR capacitor return to this pin. |
| 12 | SYSFB | input | SYS voltage program pin: a resistor divider from the pin to SYS and AGND programs the system output voltage, and leaving it floating disables the function. |
| 13 | SYS | power_out | DC-DC regulator output that powers the system load and charges the battery. |
| 14 | BATT | bidirectional | Positive battery terminal; the battery is charged from SYS through this pin and supplements the system load when needed. |
| 15 | ISET | passive | Charge current program pin: a resistor from this pin to AGND programs the constant-current charge current (floating disables the charge function). |
| 16 | NTC | input | Thermistor input: a resistor from this pin to VCC and the thermistor from this pin to ground, usually inside the battery pack, set the battery temperature thresholds. |
| 17 | ILIM | passive | Input current limit program pin: a resistor from this pin to AGND programs the input current limit with adapter input. |
| 18 | TMR | passive | Sets the timer out period; connecting TMR to AGND disables the internal timer. |
| 19 | VLIM | passive | Input voltage clamp program pin. |
| 20 | VCC | power_out | Supply voltage of the IC; the internal VCC output regulates to 4.3V to 4.6V (VIN=6V, 0mA<IVCC<25mA) with a 40mA output current limit. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | QFN-20(3x4) |
| Category | Power Management (PMIC) |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (IN operating range) | VIN | 4 | 10 | V | 5 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 5 | ||
| IN, SW voltage | -0.3 | 20 | V | 5 | |||
| BATT, SYS voltage | -0.3 | 6 | V | 5 | |||
| BST voltage | -0.3 | 26 | V | 5 | |||
| All other pins voltage | -0.3 | 6 | V | 5 | |||
| Continuous power dissipation QFN20 3mmx4mm | 2.6 | W | TA = +25°C | 5 | |||
| Junction temperature | 150 | °C | 5 | ||||
| Lead temperature | 260 | °C | 5 | ||||
| Storage temperature | -65 | 150 | °C | 5 | |||
| IN Operating Range | VIN | 4 | 10 | V | 6 | ||
| IN Under Voltage Lockout Threshold rising | 3.65 | 3.8 | 3.95 | V | Rising | 6 | |
| IN Under Voltage Lockout Threshold falling | 3.35 | 3.5 | 3.65 | V | Falling | 6 | |
| IN vs. BATT Threshold rising | 240 | 280 | 320 | mV | Rising | 6 | |
| IN vs. BATT Threshold falling | 40 | 70 | 120 | mV | Falling | 6 | |
| BST Voltage Threshold rising | VBST-VSW | 2.55 | 2.9 | 3.25 | V | Rising | 6 |
| Switching Frequency | 1.4 | 1.6 | 1.8 | MHz | 6 | ||
| Input Current Limit, USB2.0 Mode | IIN | 400 | 450 | 500 | mA | USB2.0 Mode | 6 |
| Input Current Limit, USB3.0 Mode | IIN | 750 | 825 | 900 | mA | USB3.0 Mode | 6 |
| Input Current Limit, Default Mode | IIN | 1840 | 2000 | 2160 | mA | Default Mode | 6 |
| Input Current Limit, Programmable Mode (MP2617A) | IIN | 1840 | 2000 | 2160 | mA | Programmable Mode, RILIM=22.47k (MP2617A) | 6 |
| Input Current Limit, Programmable Mode (MP2617A) | IIN | 900 | 950 | 1000 | mA | Programmable Mode, RILIM=48k (MP2617A) | 6 |
| Input Current Limit Reference Voltage | VILIM | 1.1 | 1.14 | 1.18 | V | 6 | |
| High-side NMOS On Resistance | RH_DS(ON) | 120 | 130 | mΩ | Include the BLOCK FET | 6 | |
| Low-side NMOS On Resistance | RL_DS(ON) | 80 | 100 | mΩ | 6 | ||
| High-side NMOS Peak Current limit | 3.8 | 4.8 | 5.8 | A | 6 | ||
| Input Voltage Clamp Threshold | VVLIM | 1.49 | 1.52 | 1.55 | V | Voltage on VLIM | 6 |
| Input Quiescent Current, Charger Enabled USB2.0 Mode | IIN | 2.4 | 5 | mA | Charger Enabled, USB2.0 Mode | 6 | |
| Input Quiescent Current, Charger Enabled USB3.0 Mode | IIN | 2.8 | 5 | mA | Charger Enabled, USB3.0 Mode | 6 | |
| Input Quiescent Current, Charger Enabled Programmable Mode | IIN | 3.8 | 5 | mA | Charger Enable, Programmable Mode | 6 | |
| Input Quiescent Current, Charger Enabled Default Mode | IIN | 3.8 | 5 | mA | Charger Enabled, Default Mode | 6 | |
| Minimum SYS Regulation Voltage (MP2617A) | VSYS | 3.45 | 3.6 | 3.75 | V | SYS voltage @ VBATT≤3.4V, SYSFB float | 6 |
| SYS Regulation Voltage, BATT Float (MP2617A) | VSYS | 3.5 | 4.63 | V | 3.4V<VBATT≤4.2V, SYSFB float, BATT Float | 6 | |
| SYS Regulation Voltage, User Programmed by SYSFB (MP2617A) | VSYS | 4.22 | 4.63 | V | User Programmed by SYSFB | 6 | |
| SYS Reference Voltage | VSYS_REF | 1.135 | 1.152 | 1.17 | V | 6 | |
| Terminal Battery Voltage (MP2617A) | VBATT | 4.328 | 4.35 | 4.372 | V | VBATT>VRECH, ICHG≤IBF, SYSFB float | 7 |
| Recharge Threshold at VBATT, SYSFB Float (MP2617A) | VRECH | 4.04 | 4.14 | 4.24 | V | SYSFB Float | 7 |
| Recharge Threshold at VBATT, SYSFB programmed (MP2617A) | VRECH | 3.99 | 4.09 | 4.19 | V | SYSFB programmed | 7 |
| Trickle Charge Threshold (MP2617A) | 3.01 | 3.11 | 3.21 | V | 7 | ||
| BATT to SYS Resistance | 40 | 50 | mΩ | VIN=0V, ISYS=200mA, VBATT=4.2V | 7 | ||
| BATT to SYS Current Limit | 4 | 5 | 6 | A | VSYS>VBATT-800mV, VBATT=4.2V | 7 | |
| Termination Charger Current | IBF | 5 | 10 | 15 | % of ICC | 7 | |
| IBF Maximum Limit | IBF | 150 | 200 | mA | 7 | ||
| Constant Current Mode Charge Current | ICC | 2.475 | 2.75 | 3.02 | A | RISET=760 | 7 |
| Constant Current Mode Charge Current | ICC | 1.26 | 1.4 | 1.54 | A | RISET=1.53k | 7 |
| Constant Current Mode Charge Current | ICC | 0.405 | 0.45 | 0.495 | A | RISET=4.6k | 7 |
| Battery UVLO rising | 2.4 | 2.6 | 2.8 | V | Rising | 8 | |
| Battery UVLO falling | 2.2 | 2.4 | 2.6 | V | Falling | 8 | |
| ACOK, CHGOK Pin Output Low Voltage | 270 | 350 | mV | Sinking 5mA | 8 | ||
| NTC Low Temp Rising Threshold | VTHL | 63 | 65 | 67 | %VCC | RNTC=NCP18XH103F, 0°C | 8 |
| NTC High Temp Falling Threshold | VTHH | 32 | 33.5 | 35 | %VCC | RNTC=NCP18XH103F, 50°C | 8 |
| VCC UVLO rising | 3.15 | 3.35 | 3.55 | V | Rising | 8 | |
| VCC UVLO falling | 2.8 | 3 | 3.2 | V | Falling | 8 | |
| VCC Output Voltage | 4.3 | 4.5 | 4.6 | V | 0mA<IVCC<25mA, VIN=6V | 8 | |
| EN Input Low Voltage | 0.4 | V | 8 | ||||
| EN Input High Voltage | 1.5 | V | 8 | ||||
| Input current limit setting tolerance | -8 | 8 | % | of input current limit setting | 25 | ||
| Charge current setting tolerance | -10 | 10 | % | of ICHG setting | 25 | ||
| Thermal resistance junction-to-ambient (QFN-20 3mmx4mm) | θJA | 48 | C/W | JESD51-7, 4-layer PCB | 5 | ||
| Thermal resistance junction-to-case (QFN-20 3mmx4mm) | θJC | 11 | C/W | 5 |
CAD (KiCad official)
- Symbol:
MP2617AGL-Z - Footprint:
Package_DFN_QFN:QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm - 3D model: QFN-20(3x4) (KiCad packages3D, STEP)
- 3D model files:
mp2617agl-z-etched.step/mp2617agl-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp2617agl-z.step/mp2617agl-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (32 pp, sha256
b8a13bd3be62a232, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).