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MP2560DN-LF-Z

Monolithic Power Systems · DC-DC Converters · SOIC-8-EP

MP2560DN-LF-Z from Monolithic Power Systems, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switch node and output of the integrated high-side switch; a low forward-drop Schottky diode to ground is required and must be placed close to the SW pins to reduce switching spikes.
2 EN input Enable input: pulling it below the specified threshold (1.2V falling, 1.5V rising) shuts the chip down, while pulling it above threshold or leaving it floating enables the chip.
3 COMP passive Output of the error amplifier where loop frequency compensation is applied; COMP should not be pulled up beyond 2.6V.
4 FB input Input to the error amplifier; the output voltage is set by a resistive divider between VOUT and GND, scaling VOUT down to the internal 0.8V reference (VFB 0.776V to 0.824V).
5 GND power_in Ground, to be connected as close as possible to the output capacitor to shorten high-current switch paths; the exposed pad must also be connected to the ground plane.
6 FREQ input Switching frequency program input; a resistor from this pin to ground sets the switching frequency, which can be programmed up to 4MHz.
7 VIN power_in Input supply for all internal control circuitry, both BS regulators and the high-side switch, operating from 4.5V to 42V; a decoupling capacitor to ground must be placed close to this pin.
8 BST power_in Positive supply for the internal floating high-side MOSFET driver; a bypass capacitor must be connected between BST and SW.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Monolithic Power Systems
Package SOIC-8-EP
Category Power Management ICs
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Feedback Voltage VFB 0.776 0.8 0.824 V 4.5V < VIN < 42V 3
Error Amp Transconductance GEA 40 60 80 µA/V ICOMP = ±3µA 3
Oscillator Frequency fS 1.6 2 2.4 MHz RFREQ = 45kΩ 3
Oscillator Frequency fS 3.2 4 4.8 MHz RFREQ = 18kΩ 3
VIN UVLO Threshold 2.7 3 3.3 V 3
EN Up Threshold 1.3 1.5 1.7 V 3
Supply Voltage VIN 4.5 42 V 2
Output Voltage VOUT 0.8 39 V 2
Operating Temperature -40 85 °C 2
Supply Voltage VIN -0.3 45 V 2
Switch Voltage VSW -0.3 V -7V for <10ns; upper limit printed as VIN + 0.3V 2
BST to SW -0.3 6 V 2
All Other Pins -0.3 6 V 2
Continuous Power Dissipation 2.5 W TA = +25°C, SOIC8 package 2
Junction Temperature 150 °C 2
Storage Temperature -65 150 °C 2
Thermal Resistance Junction-to-Ambient θJA 50 °C/W SOIC8 (Exposed Pad); measured on JESD51-7 4-layer board 2
Thermal Resistance Junction-to-Case θJC 10 °C/W SOIC8 (Exposed Pad) 2

CAD (KiCad official)

  • Symbol: MP2560DN-LF-Z
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)
  • 3D model files: mp2560dn-lf-z-etched.step / mp2560dn-lf-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mp2560dn-lf-z.step / mp2560dn-lf-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Monolithic Power Systems datasheet (19 pp, sha256 7eee0d7cfa22c520, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF