component
MP24943DS-LF-Z
Public Made by Adomby adom
Monolithic Power Systems DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MP24943DS-LF-Z
Monolithic Power Systems · DC-DC Converters · SOIC-8
MP24943DS-LF-Z from Monolithic Power Systems, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage input with an unregulated range of 4.5V to 55V; an input capacitor (CIN) is required to decouple it and it provides the drain of the internal power device. |
| 2 | GND | power_in | Ground and voltage reference for the regulated output; this node must be placed outside the D1-to-CIN ground path to prevent current spikes from inducing voltage noise. |
| 3 | EN | input | Enable input: pulling it below 0.4V shuts the chip down, and pulling it above 1.8V enables the chip. |
| 4 | FB | input | Feedback input for an external resistor divider from VOUT to GND that sets the output voltage against the 0.8V reference. |
| 5 | SS | input | Soft-start pin; connect an external capacitor to set the soft-start ramp. |
| 6 | VO | input | Output over-voltage protection input; connect to the tap of an external divider from VOUT to GND, with the OVP reference at 0.9V. |
| 7 | BST | passive | Bootstrap pin; a capacitor between SW and BST forms a floating supply that drives the power switch gate above the supply voltage, with an optional external diode from VIN or VOUT if the on-chip regulator is not strong enough. |
| 8 | SW | output | Switch output that connects the internal power switch and inductor to the output supply. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Feedback Voltage | VFB | 0.78 | 0.8 | 0.82 | V | 4.5V ≤ VIN ≤ 55V | 3 |
| Feedback Bias Current | IBIAS(FB) | -100 | 10 | 100 | nA | VFB = 0.8V | 3 |
| Output Over-Voltage Reference | VOVREF | 0.88 | 0.92 | 0.96 | V | 3 | |
| Switch-On Resistance | RDS(ON) | 0.125 | 0.15 | Ω | 3 | ||
| Switch Leakage Current | 0.1 | 1 | μA | VEN = 0V, VSW = 0V | 3 | ||
| Current Limit | 5.5 | 6.5 | 8 | A | Duty Cycle=10% | 3 | |
| Oscillator Frequency | fSW | 70 | 100 | 140 | kHz | VFB = 0.6V | 3 |
| Bootstrap Voltage | VBST - VSW | 4.3 | 5.5 | V | 3 | ||
| Minimum-On Time | tON | 50 | 100 | 250 | ns | 3 | |
| SW-rising edge | trise | 50 | 100 | ns | 3 | ||
| SW-falling edge | tfall | 50 | 100 | ns | 3 | ||
| EN-Input Low Voltage | 0.4 | V | 3 | ||||
| EN-Input High Voltage | 1.8 | V | 3 | ||||
| EN-Input Bias Current | -10 | -2 | 10 | μA | VEN=0-6V | 3 | |
| Under-Voltage Lockout Threshold Rising | 3 | 3.3 | 3.6 | V | 3 | ||
| Supply Current (Shutdown) | 4 | 10 | μA | VEN=0V | 3 | ||
| Supply Current (Quiescent) | 650 | 800 | μA | VEN = 2V, VFB = 1V | 3 | ||
| Under-Voltage Lockout Threshold Hysteresis | 200 | mV | 3 | ||||
| Thermal Shutdown | 150 | °C | 3 | ||||
| Input Voltage | VIN | 60 | V | 2 | |||
| Switch Voltage | VSW | -0.3 | V | Upper limit printed as VIN + 0.3V | 2 | ||
| All Other Pins Voltage | -0.3 | 6.5 | V | All other pins | 2 | ||
| Junction Temperature | 150 | °C | 2 | ||||
| Lead Temperature | 260 | °C | 2 | ||||
| Storage Temperature | -65 | 150 | °C | 2 | |||
| Continuous Power Dissipation (SOIC8) | 1.38 | W | TA = 25°C | 2 | |||
| Input Voltage | VIN | 4.5 | 55 | V | 2 | ||
| Output Voltage | VOUT | 0.8 | 45 | V | 2 | ||
| Maximum Junction Temperature | TJ | 125 | °C | 2 | |||
| Operating Free Air Temperature | TA | -40 | 85 | °C | Ordering information, free air temperature | 2 | |
| Thermal Resistance Junction-to-Ambient (SOIC8) | θJA | 90 | °C/W | Measured on JESD51-7, 4-layer PCB | 2 | ||
| Thermal Resistance Junction-to-Case (SOIC8) | θJC | 45 | °C/W | Measured on JESD51-7, 4-layer PCB | 2 |
CAD (KiCad official)
- Symbol:
MP24943DS-LF-Z - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mp24943ds-lf-z-etched.step/mp24943ds-lf-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp24943ds-lf-z.step/mp24943ds-lf-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (13 pp, sha256
91595da34b0e9f1a, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MP24943DS-LF-Z
**Monolithic Power Systems** · DC-DC Converters · SOIC-8
MP24943DS-LF-Z from Monolithic Power Systems, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage input with an unregulated range of 4.5V to 55V; an input capacitor (CIN) is required to decouple it and it provides the drain of the internal power device. |
| 2 | GND | power_in | Ground and voltage reference for the regulated output; this node must be placed outside the D1-to-CIN ground path to prevent current spikes from inducing voltage noise. |
| 3 | EN | input | Enable input: pulling it below 0.4V shuts the chip down, and pulling it above 1.8V enables the chip. |
| 4 | FB | input | Feedback input for an external resistor divider from VOUT to GND that sets the output voltage against the 0.8V reference. |
| 5 | SS | input | Soft-start pin; connect an external capacitor to set the soft-start ramp. |
| 6 | VO | input | Output over-voltage protection input; connect to the tap of an external divider from VOUT to GND, with the OVP reference at 0.9V. |
| 7 | BST | passive | Bootstrap pin; a capacitor between SW and BST forms a floating supply that drives the power switch gate above the supply voltage, with an optional external diode from VIN or VOUT if the on-chip regulator is not strong enough. |
| 8 | SW | output | Switch output that connects the internal power switch and inductor to the output supply. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Feedback Voltage | VFB | 0.78 | 0.8 | 0.82 | V | 4.5V ≤ VIN ≤ 55V | 3 |
| Feedback Bias Current | IBIAS(FB) | -100 | 10 | 100 | nA | VFB = 0.8V | 3 |
| Output Over-Voltage Reference | VOVREF | 0.88 | 0.92 | 0.96 | V | | 3 |
| Switch-On Resistance | RDS(ON) | | 0.125 | 0.15 | Ω | | 3 |
| Switch Leakage Current | | | 0.1 | 1 | μA | VEN = 0V, VSW = 0V | 3 |
| Current Limit | | 5.5 | 6.5 | 8 | A | Duty Cycle=10% | 3 |
| Oscillator Frequency | fSW | 70 | 100 | 140 | kHz | VFB = 0.6V | 3 |
| Bootstrap Voltage | VBST - VSW | 4.3 | | 5.5 | V | | 3 |
| Minimum-On Time | tON | 50 | 100 | 250 | ns | | 3 |
| SW-rising edge | trise | | 50 | 100 | ns | | 3 |
| SW-falling edge | tfall | | 50 | 100 | ns | | 3 |
| EN-Input Low Voltage | | | | 0.4 | V | | 3 |
| EN-Input High Voltage | | 1.8 | | | V | | 3 |
| EN-Input Bias Current | | -10 | -2 | 10 | μA | VEN=0-6V | 3 |
| Under-Voltage Lockout Threshold Rising | | 3 | 3.3 | 3.6 | V | | 3 |
| Supply Current (Shutdown) | | | 4 | 10 | μA | VEN=0V | 3 |
| Supply Current (Quiescent) | | | 650 | 800 | μA | VEN = 2V, VFB = 1V | 3 |
| Under-Voltage Lockout Threshold Hysteresis | | | 200 | | mV | | 3 |
| Thermal Shutdown | | | 150 | | °C | | 3 |
| Input Voltage | VIN | | | 60 | V | | 2 |
| Switch Voltage | VSW | -0.3 | | | V | Upper limit printed as VIN + 0.3V | 2 |
| All Other Pins Voltage | | -0.3 | | 6.5 | V | All other pins | 2 |
| Junction Temperature | | | | 150 | °C | | 2 |
| Lead Temperature | | | | 260 | °C | | 2 |
| Storage Temperature | | -65 | | 150 | °C | | 2 |
| Continuous Power Dissipation (SOIC8) | | | | 1.38 | W | TA = 25°C | 2 |
| Input Voltage | VIN | 4.5 | | 55 | V | | 2 |
| Output Voltage | VOUT | 0.8 | | 45 | V | | 2 |
| Maximum Junction Temperature | TJ | | | 125 | °C | | 2 |
| Operating Free Air Temperature | TA | -40 | | 85 | °C | Ordering information, free air temperature | 2 |
| Thermal Resistance Junction-to-Ambient (SOIC8) | θJA | | 90 | | °C/W | Measured on JESD51-7, 4-layer PCB | 2 |
| Thermal Resistance Junction-to-Case (SOIC8) | θJC | | 45 | | °C/W | Measured on JESD51-7, 4-layer PCB | 2 |
## CAD (KiCad official)
- Symbol: `MP24943DS-LF-Z`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `mp24943ds-lf-z-etched.step` / `mp24943ds-lf-z-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mp24943ds-lf-z.step` / `mp24943ds-lf-z.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Monolithic Power Systems datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600493348986118144) (13 pp, sha256 `91595da34b0e9f1a`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mp24943ds-lf-z-datasheet.pdf)