component
MP2467DN-LF-Z
Public Made by Adomby adom
Monolithic Power Systems Global Sourcing Parts, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MP2467DN-LF-Z
Monolithic Power Systems · Global Sourcing Parts · SOIC-8-EP
MP2467DN-LF-Z from Monolithic Power Systems, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | output | Switch node is the output of the high-side switch and requires a low-Vf Schottky rectifier to ground placed close to the SW pins to reduce switching spikes. |
| 2 | EN | input | Enable input: pulling it below the 1.2V falling threshold shuts the chip down, while pulling it above the 1.5V rising threshold or leaving it floating enables the chip. |
| 3 | COMP | passive | Output of the error amplifier where loop frequency compensation is applied; the minimum voltage is clamped to 0.9V, the maximum to 2.0V, and it should not be pulled above 2.6V. |
| 4 | FB | input | Error amplifier feedback input, where an external resistive divider from the output to GND is compared to the internal 0.8V reference (VFB 0.776V to 0.824V over 6V to 36V VIN). |
| 5 | GND | power_in | Ground, to be connected as close as possible to the output capacitor while avoiding the high-current switch paths. |
| 6 | RSET | passive | Internal bias setting pin, to which a 200kΩ resistor must be connected. |
| 7 | VIN | power_in | Input supply for all internal control circuitry, bootstrap regulator and high-side switch, operating from 6V to 36V, with a decoupling capacitor to ground placed close to this pin. |
| 8 | BST | power_in | Positive supply for the internal floating high-side MOSFET driver, with a bypass capacitor connected between this pin and the SW pin. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | SOIC-8-EP |
| Category | Global Sourcing Parts |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Feedback Voltage | VFB | 0.776 | 0.8 | 0.824 | V | 6V < VIN < 36V | 3 |
| Upper Switch Leakage Current | 1 | μA | VEN = 0V, VSW = 0V | 3 | |||
| Current Limit | 2.9 | 3.5 | A | 3 | |||
| Error Amp Transconductance | 40 | 60 | 80 | µA/V | ICOMP = ±3µA | 3 | |
| Error Amp Min Source current | 5 | µA | VFB = 0.7V | 3 | |||
| Error Amp Min Sink current | -5 | µA | VFB = 0.9V | 3 | |||
| VIN UVLO Threshold | 2.7 | 3 | 3.3 | V | 3 | ||
| Oscillator Frequency | 400 | 500 | 600 | KHz | 3 | ||
| Minimum Switch On Time | 100 | ns | 3 | ||||
| Shutdown Supply Current | 12 | 20 | µA | VEN = 0V | 3 | ||
| Quiescent Supply Current | 100 | 125 | µA | No load, VFB = 0.9V | 3 | ||
| EN Up Threshold | 1.35 | 1.5 | 1.65 | V | 3 | ||
| EN Down Threshold | 1.15 | 1.2 | 1.25 | V | 3 | ||
| Minimum Off Time | 200 | ns | 3 | ||||
| Supply Voltage | VIN | 6 | 36 | V | 2 | ||
| Output Voltage | VOUT | 0.8 | 30 | V | 2 | ||
| Operating Junction Temperature | TJ | -40 | 125 | °C | 2 | ||
| Free Air Temperature | TA | -40 | 85 | °C | 2 | ||
| Supply Voltage (VIN) | VIN | -0.3 | 40 | V | 2 | ||
| Switch Voltage | VSW | -0.3 | V | maximum printed as VIN + 0.3V | 2 | ||
| BST to SW | -0.3 | 5 | V | 2 | |||
| All Other Pins | -0.3 | 5 | V | 2 | |||
| Continuous Power Dissipation | 2.5 | W | TA = +25°C | 2 | |||
| Junction Temperature | 150 | °C | 2 | ||||
| Storage Temperature | -65 | 150 | °C | 2 | |||
| Thermal Resistance Junction-to-Ambient | θJA | 50 | °C/W | SOIC8E, JESD51-7 4-layer PCB | 2 | ||
| Thermal Resistance Junction-to-Case | θJC | 10 | °C/W | SOIC8E | 2 |
CAD (KiCad official)
- Symbol:
MP2467DN-LF-Z - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
mp2467dn-lf-z-etched.step/mp2467dn-lf-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp2467dn-lf-z.step/mp2467dn-lf-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (17 pp, sha256
eede63d79487068c, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MP2467DN-LF-Z
**Monolithic Power Systems** · Global Sourcing Parts · SOIC-8-EP
MP2467DN-LF-Z from Monolithic Power Systems, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | output | Switch node is the output of the high-side switch and requires a low-Vf Schottky rectifier to ground placed close to the SW pins to reduce switching spikes. |
| 2 | EN | input | Enable input: pulling it below the 1.2V falling threshold shuts the chip down, while pulling it above the 1.5V rising threshold or leaving it floating enables the chip. |
| 3 | COMP | passive | Output of the error amplifier where loop frequency compensation is applied; the minimum voltage is clamped to 0.9V, the maximum to 2.0V, and it should not be pulled above 2.6V. |
| 4 | FB | input | Error amplifier feedback input, where an external resistive divider from the output to GND is compared to the internal 0.8V reference (VFB 0.776V to 0.824V over 6V to 36V VIN). |
| 5 | GND | power_in | Ground, to be connected as close as possible to the output capacitor while avoiding the high-current switch paths. |
| 6 | RSET | passive | Internal bias setting pin, to which a 200kΩ resistor must be connected. |
| 7 | VIN | power_in | Input supply for all internal control circuitry, bootstrap regulator and high-side switch, operating from 6V to 36V, with a decoupling capacitor to ground placed close to this pin. |
| 8 | BST | power_in | Positive supply for the internal floating high-side MOSFET driver, with a bypass capacitor connected between this pin and the SW pin. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | SOIC-8-EP |
| Category | Global Sourcing Parts |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Feedback Voltage | VFB | 0.776 | 0.8 | 0.824 | V | 6V < VIN < 36V | 3 |
| Upper Switch Leakage Current | | | | 1 | μA | VEN = 0V, VSW = 0V | 3 |
| Current Limit | | 2.9 | | 3.5 | A | | 3 |
| Error Amp Transconductance | | 40 | 60 | 80 | µA/V | ICOMP = ±3µA | 3 |
| Error Amp Min Source current | | 5 | | | µA | VFB = 0.7V | 3 |
| Error Amp Min Sink current | | -5 | | | µA | VFB = 0.9V | 3 |
| VIN UVLO Threshold | | 2.7 | 3 | 3.3 | V | | 3 |
| Oscillator Frequency | | 400 | 500 | 600 | KHz | | 3 |
| Minimum Switch On Time | | 100 | | | ns | | 3 |
| Shutdown Supply Current | | | 12 | 20 | µA | VEN = 0V | 3 |
| Quiescent Supply Current | | | 100 | 125 | µA | No load, VFB = 0.9V | 3 |
| EN Up Threshold | | 1.35 | 1.5 | 1.65 | V | | 3 |
| EN Down Threshold | | 1.15 | 1.2 | 1.25 | V | | 3 |
| Minimum Off Time | | 200 | | | ns | | 3 |
| Supply Voltage | VIN | 6 | | 36 | V | | 2 |
| Output Voltage | VOUT | 0.8 | | 30 | V | | 2 |
| Operating Junction Temperature | TJ | -40 | | 125 | °C | | 2 |
| Free Air Temperature | TA | -40 | | 85 | °C | | 2 |
| Supply Voltage (VIN) | VIN | -0.3 | | 40 | V | | 2 |
| Switch Voltage | VSW | -0.3 | | | V | maximum printed as VIN + 0.3V | 2 |
| BST to SW | | -0.3 | | 5 | V | | 2 |
| All Other Pins | | -0.3 | | 5 | V | | 2 |
| Continuous Power Dissipation | | | | 2.5 | W | TA = +25°C | 2 |
| Junction Temperature | | | | 150 | °C | | 2 |
| Storage Temperature | | -65 | | 150 | °C | | 2 |
| Thermal Resistance Junction-to-Ambient | θJA | | 50 | | °C/W | SOIC8E, JESD51-7 4-layer PCB | 2 |
| Thermal Resistance Junction-to-Case | θJC | | 10 | | °C/W | SOIC8E | 2 |
## CAD (KiCad official)
- Symbol: `MP2467DN-LF-Z`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files: `mp2467dn-lf-z-etched.step` / `mp2467dn-lf-z-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mp2467dn-lf-z.step` / `mp2467dn-lf-z.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Monolithic Power Systems datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8581454445387046912) (17 pp, sha256 `eede63d79487068c`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mp2467dn-lf-z-datasheet.pdf)