component
MP20075DH-LF-Z
Public Made by Adomby adom
Monolithic Power Systems Power Management - Specialized, MSOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "mp20075dh-lf-z",
"version": "0.1.0",
"type": "component",
"description": "Monolithic Power Systems Power Management - Specialized, MSOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"mp20075dh-lf-z",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"mp20075dh-lf-z.kicad_sym",
"mp20075dh-lf-z.kicad_mod",
"mp20075dh-lf-z.glb",
"mp20075dh-lf-z.step",
"mp20075dh-lf-z.lbr",
"docs/hero.png",
"docs/mp20075dh-lf-z-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"mp20075dh-lf-z-hero.glb",
"mp20075dh-lf-z-hero.overlay.json",
"mp20075dh-lf-z-etched.glb"
],
"component": {
"mpn": "MP20075DH-LF-Z",
"manufacturer": "Monolithic Power Systems",
"package": "MSOP-8-EP",
"pin_count": 9,
"category": "Power Management (PMIC)",
"subcategory": "Power Management - Specialized",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590906849816358912",
"parts": {
"symbol": "mp20075dh-lf-z.kicad_sym",
"footprint": "mp20075dh-lf-z.kicad_mod",
"model_3d": "mp20075dh-lf-z-hero.glb",
"model_3d_plain": "mp20075dh-lf-z-etched.glb",
"model_3d_step": "mp20075dh-lf-z-etched.step",
"model_3d_step_plain": "mp20075dh-lf-z.step",
"lbr": "mp20075dh-lf-z.lbr"
},
"distributor_links": {
"lcsc": "C17378243",
"digikey": "1589-1551-2-ND",
"mouser": "946-MP20075DHLFZ"
},
"distributor_check": {
"checked_at": "2026-10-20T23:46:58Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "1589-1551-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "946-MP20075DHLFZ",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "DDQ",
"type": "power_in",
"description": "Power input for the VTT regulator, normally connected to the DDR2/3/3L/4 VDDQ rail and bypassed with a 10μF ceramic capacitor; absolute maximum supply voltage VDDQ is -0.3V to 3.6V."
},
{
"number": "2",
"name": "VTT",
"type": "power_out",
"description": "Output of the VTT LDO, a precision VREF/2 voltage that tracks VREF, which sources or sinks up to 3A and is recommended to be bypassed with 2x10μF ceramic capacitors."
},
{
"number": "3",
"name": "GND",
"type": "power_in",
"description": "Ground pin, which must be connected to the same ground plane as the exposed pad."
},
{
"number": "4",
"name": "VTTSEN",
"type": "input",
"description": "Kelvin-sensed feedback input that should be connected to the VTT regulation point (usually the VTT local bypass capacitor) through a direct sense trace."
},
{
"number": "5",
"name": "VDRV",
"type": "power_in",
"description": "Chip bias voltage that should be connected to a 3.3V supply within the recommended 3.0V to 3.5V range and bypassed with a 4.7μF capacitor."
},
{
"number": "6",
"name": "REF",
"type": "input",
"description": "LDO signal input used to generate the VDDQ/2 reference, to be bypassed with a 0.1μF capacitor."
},
{
"number": "7",
"name": "EN",
"type": "input",
"description": "VTT regulator enable input where EN high enables the MP20075, with EN_H threshold of 1.4V and EN_L threshold of 0.5V, and the datasheet calls for a 100k pull-up resistor."
},
{
"number": "8",
"name": "VTTREF",
"type": "output",
"description": "Precision buffered VREF/2 output that tracks VREF with a drive capability of up to 10mA for the DDR memory input comparators."
},
{
"number": "9",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet lists pin 3 as 'GND, Exposed Pad' in one row. The exposed pad on the MSOP8E package ha; The VTTREF bypass value is inconsistent in the datasheet. The pin function table says 0.1μF, while t; The VDRV bypass value is inconsistent. The pin table says 4.7μF, while the application section gives"
],
"pages_sent": 11,
"cost_usd": 0.0538,
"at": "2026-10-20T23:43:26"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590906849816358912",
"pages": 11,
"sha256": "1ffd1742b5c1a12a",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 9,
"described": 9,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "mp20075dh-lf-z.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
4.9,
3.0,
0.96
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "43252be3beac8fd30ca9bfeb82a613fa01d5dffff9b22810c13a4655daafb5ee",
"checked": "2026-10-20",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "mp20075dh-lf-z-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
4.9,
3.0,
0.96
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f7d853493c1541db4956322695981e5fb01ff176fd7cb5e733d8885cd354e92a",
"checked": "2026-10-20",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}