component
MP1924AHS-LF-Z
Public Made by Adomby adom
Monolithic Power Systems Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMP1924AHS-LF-Z
Monolithic Power Systems · Gate Drivers · SOIC-8
MP1924AHS-LF-Z from Monolithic Power Systems, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply input powering the internal circuitry; place a decoupling capacitor to ground close to VDD (recommended 8.0V to 15.0V, absolute max -0.3V to +18V). |
| 2 | BST | power_in | Bootstrap positive supply for the internal floating high-side MOSFET driver; connect a bypass capacitor between BST and SW (BST to SW -0.3V to +18V, BST up to +115V). |
| 3 | DRVH | output | Floating high-side driver output, referenced to SW (DRVH to SW -0.3V to +18.3V). |
| 4 | SW | passive | Switching node, the high-side driver return (recommended -1.0V to +100V, absolute max -5V to +105V). |
| 5 | INH | input | Control signal input for the floating high-side driver, TTL-compatible with 185kΩ typical internal pull-down. |
| 6 | INL | input | Control signal input for the low-side driver, TTL-compatible with 185kΩ typical internal pull-down. |
| 7 | VSS | power_in | Chip ground. |
| 8 | DRVL | output | Low-side driver output (DRVL to VSS -0.3V to +18.3V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD quiescent current | IDDQ | 100 | 150 | µA | INL = INH = 0 | 4 | |
| Floating driver quiescent current | IBSTQ | 60 | 90 | µA | INL = INH = 0 | 4 | |
| Leakage current | ILK | 0.05 | 1 | µA | BST = SW = 100V | 4 | |
| INL/INH high | 2 | 2.4 | V | 4 | |||
| INL/INH low | 1.4 | 1 | V | 4 | |||
| VDD rising threshold | VDDR | 6 | 6.8 | 7.2 | V | 4 | |
| BST-SW rising threshold | VBSTR | 5.8 | 6.5 | 6.9 | V | 4 | |
| Low-side source current | IOHL | 3 | 5.1 | A | VDRVL = 0V, VDD = 12V | 4 | |
| Low-side source current | IOHL | 4.7 | 8 | A | VDRVL = 0V, VDD = 16V | 4 | |
| Low-side sink current | IOLL | 4.5 | 6.4 | A | VDRVL = VDD = 12V | 4 | |
| Low-side sink current | IOLL | 6 | 9 | A | VDRVL = VDD = 16V | 4 | |
| Floating source current | IOHH | 2.6 | 4.6 | A | VDRVH = 0V, VDD = 12V | 4 | |
| Floating source current | IOHH | 4 | 7.5 | A | VDRVH = 0V, VDD = 16V | 4 | |
| Floating sink current | IOLH | 4.5 | 5.8 | A | VDRVH = VDD = 12V | 4 | |
| Floating sink current | IOLH | 5.9 | 8.6 | A | VDRVH = VDD = 16V | 4 | |
| Driver matching TMON | TMON | 1 | 5 | ns | 5 | ||
| Driver matching TMOFF | TMOFF | 1 | 5 | ns | 5 | ||
| Supply voltage | VDD | -0.3 | 18 | V | 3 | ||
| SW voltage | VSW | -5 | 105 | V | 3 | ||
| BST voltage | VBST | -0.3 | 115 | V | 3 | ||
| BST to SW | -0.3 | 18 | V | 3 | |||
| DRVH to SW | -0.3 | 18.3 | V | 3 | |||
| DRVL to VSS | -0.3 | 18.3 | V | 3 | |||
| INH/INL to VSS | -0.3 | V | to (VDD + 0.3V) | 3 | |||
| Continuous power dissipation SOIC-8 | 1.3 | W | TA = 25°C | 3 | |||
| Junction temperature | TJ | 150 | °C | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Supply voltage | VDD | 8 | 15 | V | 3 | ||
| SW voltage | VSW | -1 | 100 | V | 3 | ||
| SW slew rate | 50 | V/ns | <50V/ns | 3 | |||
| Operating junction temperature | TJ | -40 | 125 | °C | TJ = TA | 3 | |
| Thermal resistance junction-ambient SOIC-8 | θJA | 96 | °C/W | JESD51-7, 4-layer PCB | 3 | ||
| Thermal resistance junction-case SOIC-8 | θJC | 45 | °C/W | JESD51-7, 4-layer PCB | 3 | ||
| VDD operating current | IDDO | 9 | mA | fsw = 500kHz | 4 | ||
| Floating driver operating current | IBSTO | 7.5 | mA | fsw = 500kHz | 4 | ||
| Thermal shutdown | 150 | °C | 5 |
CAD (KiCad official)
- Symbol:
MP1924AHS-LF-Z - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
mp1924ahs-lf-z-etched.step/mp1924ahs-lf-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp1924ahs-lf-z.step/mp1924ahs-lf-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (18 pp, sha256
e12e357de58414e7, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).