component
MP1477HGTF-Z
Public Made by Adomby adom
Monolithic Power Systems DC-DC Converters, SOT-563. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MP1477HGTF-Z
Monolithic Power Systems · DC-DC Converters · SOT-563
MP1477HGTF-Z from Monolithic Power Systems, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage for the regulator, which operates from a 4.2V to 17V input rail; decouple with capacitor C1 and connect using a wide PCB trace. |
| 2 | SW | output | Switch output connected to the internal power MOSFETs; the datasheet limits VSW to -0.6V (-6.5V for under 10ns) up to VIN + 0.3V (19V for under 10ns) and requires a wide PCB trace. |
| 3 | GND | power_in | System ground and reference for the regulated output voltage, which requires careful PCB layout and should be connected with copper traces and vias. |
| 4 | BST | passive | Bootstrap pin, where a 1µF BST capacitor and a resistor between SW and BST form a floating supply for the high-side driver; the absolute maximum VBST is VSW + 5V. |
| 5 | EN | input | Enable input, where driving EN high turns the regulator on, with a rising threshold of 1.14V to 1.26V, an absolute maximum of 5V, and a 100kΩ pull-up to VIN for automatic start-up. |
| 6 | FB | input | Feedback input, connected to the tap of an external resistor divider from VOUT to GND to set the output voltage from 0.8V, with VREF typically 805mV. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | SOT-563 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Oscillator frequency | fSW | 1000 | 1200 | 1500 | kHz | VFB = 0.75V | 4 |
| Feedback voltage | VREF | 793 | 805 | 817 | mV | TJ = +25°C | 4 |
| Feedback voltage | VREF | 789 | 805 | 821 | mV | TJ = -40°C to 125°C | 4 |
| EN rising threshold | VEN_RISING | 1.14 | 1.2 | 1.26 | V | 4 | |
| VIN under-voltage lockout threshold rising | INUVVth | 3.7 | 4 | 4.18 | V | 4 | |
| Soft-start period | TSS | 1.6 | 2.5 | 3 | ms | 4 | |
| Supply current (quiescent) | IQ | 170 | 200 | 250 | μA | VEN = 2V, VFB = 0.85V | 4 |
| Feedback current | IFB | 10 | 100 | nA | 4 | ||
| Input voltage (VIN) | VIN | -0.3 | 18 | V | 3 | ||
| Switch voltage (VSW) | VSW | -0.6 | V | -6.5V for <10ns | 3 | ||
| Switch voltage (VSW) | VSW | 19 | V | for <10ns; DC maximum is VIN + 0.3V | 3 | ||
| Enable voltage | VEN | -0.3 | 5 | V | 3 | ||
| All other pins voltage | -0.3 | 5 | V | 3 | |||
| Junction temperature | TJ | 150 | °C | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Supply voltage | VIN | 4.2 | 17 | V | 3 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 3 | ||
| Supply current (shutdown) | IIN | 10 | μA | VEN = 0V | 4 | ||
| HS switch on resistance | HSRDS(ON) | 58 | mΩ | VBST-SW = 3.3V | 4 | ||
| LS switch on resistance | LSRDS(ON) | 25 | mΩ | 4 | |||
| Switch leakage | SWLKG | 10 | μA | VEN = 0V, VSW = 12V | 4 | ||
| Valley current limit | ILIMIT | 4 | A | VOUT = 0V | 4 | ||
| Minimum on time | TON_MIN | 45 | ns | 4 | |||
| Minimum off time | TOFF_MIN | 180 | ns | 4 | |||
| FB under-voltage threshold (H to L) | VUV_th | 44 | % Vref | Hiccup entry | 4 | ||
| Hiccup duty cycle | DHiccup | 25 | % | 4 | |||
| EN hysteresis | VEN_HYS | 100 | mV | 4 | |||
| EN input current | IEN | 2 | µA | VEN = 2V | 4 | ||
| VIN under-voltage lockout threshold hysteresis | INUVHYS | 330 | mV | 4 | |||
| Thermal shutdown | TSD | 150 | °C | 4 | |||
| Thermal hysteresis | TSDHYS | 20 | °C | 4 | |||
| Junction-to-ambient thermal resistance (EV board, 2-layer) | θJA | 55 | °C/W | EV1477H-TF-00B, 2-layer PCB | 3 | ||
| Junction-to-ambient thermal resistance (JESD51-7) | θJA | 130 | °C/W | JESD51-7, 4-layer PCB | 3 |
CAD (KiCad official)
- Symbol:
MP1477HGTF-Z - Footprint:
Package_TO_SOT_SMD:SOT-563 - 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files:
mp1477hgtf-z-etched.step/mp1477hgtf-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp1477hgtf-z.step/mp1477hgtf-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (20 pp, sha256
106be9f7729d689b, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).