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MMUN5311DW

YFW · Digital Transistors · SOT-363

MMUN5311DW from YFW, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 E2 passive Emitter of Q2 (NPN), shown in the schematic connected to the base through R2 (10 k for MMUN5311DW).
2 B2 input Base of Q2 (NPN), entering through series resistor R1 (10 k for MMUN5311DW).
3 C1 passive Collector of Q1 (PNP), shown at the bottom of the schematic; Q1 Vceo and Vcbo are rated 50 V and Ic 100 mA.
4 E1 passive Emitter of Q1 (PNP), shown at the top of the schematic, connected to the base through R2 (10 k).
5 B1 input Base of Q1 (PNP), entering through series resistor R1 (10 k for MMUN5311DW).
6 C2 passive Collector of Q2 (NPN), shown at the top of the schematic; Vceo and Vcbo are rated 50 V and Ic 100 mA.

Key specifications

Parameter Value
Manufacturer YFW
Package SOT-363
Category Transistors/Thyristors
Pins 6

CAD (KiCad official)

  • Symbol: MMUN5311DW
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363 (KiCad packages3D, STEP)
  • 3D model files: mmun5311dw-etched.step / mmun5311dw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mmun5311dw.step / mmun5311dw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: YFW datasheet (7 pp, sha256 db6d54177423bfe1, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF