component
MMDTC114EE
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ST Semtech Digital Transistors, SOT-523. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MMDTC114EE
ST Semtech · Digital Transistors · SOT-523
MMDTC114EE from ST Semtech, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Base | input | Base (Input) connects through built-in R1 (7 to 13 kΩ, 10 kΩ typ) to the transistor base, with input voltage rated -10 to +40 V. |
| 2 | Emitter | passive | Emitter (Common) is the common return of the NPN digital transistor and of the R2 bias resistor. |
| 3 | Collector | passive | Collector (Output) is the switched output, rated VCEO 50 V and IC 100 mA maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ST Semtech |
| Package | SOT-523 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Current Gain | hFE | 30 | at VCE = 5 V, IC = 5 mA | 2 | |||
| Collector Base Cutoff Current | ICBO | 500 | nA | at VCB = 50 V | 2 | ||
| Emitter Base Cutoff Current | IEBO | 0.88 | mA | at VEB = 5 V | 2 | ||
| Collector Emitter Saturation Voltage | VCE(sat) | 0.3 | V | at IC = 10 mA, IB = 0.5 mA | 2 | ||
| Input on Voltage | VI(on) | 3 | V | at VCE = 0.3 V, IC = 10 mA | 2 | ||
| Input off Voltage | VI(off) | 0.5 | V | at VCE = 5 V, IC = 100 µA | 2 | ||
| Input Resistance | R1 | 7 | 10 | 13 | kΩ | 2 | |
| Resistance Ratio | R2 / R1 | 0.8 | 1 | 1.2 | - | 2 | |
| Collector Emitter Voltage | VCEO | 50 | V | 1 | |||
| Input Voltage | VI | -10 | 40 | V | 1 | ||
| Collector Current | IC | 100 | mA | 1 | |||
| Power Dissipation | Ptot | 150 | mW | 1 | |||
| Junction Temperature | Tj | 150 | 1 | ||||
| Storage Temperature Range | Tstg | -55 | 150 | 1 | |||
| Thermal Resistance from Junction to Ambient | RθJA | 833 | /W | Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout | 1 |
CAD (KiCad official)
- Symbol:
MMDTC114EE - Footprint:
Package_TO_SOT_SMD:SOT-523 - 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
mmdtc114ee-etched.step/mmdtc114ee-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mmdtc114ee.step/mmdtc114ee.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ST Semtech datasheet (4 pp, sha256
196301eae74c123f, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MMDTC114EE
**ST Semtech** · Digital Transistors · SOT-523
MMDTC114EE from ST Semtech, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Base | input | Base (Input) connects through built-in R1 (7 to 13 kΩ, 10 kΩ typ) to the transistor base, with input voltage rated -10 to +40 V. |
| 2 | Emitter | passive | Emitter (Common) is the common return of the NPN digital transistor and of the R2 bias resistor. |
| 3 | Collector | passive | Collector (Output) is the switched output, rated VCEO 50 V and IC 100 mA maximum. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ST Semtech |
| Package | SOT-523 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Current Gain | hFE | 30 | | | | at VCE = 5 V, IC = 5 mA | 2 |
| Collector Base Cutoff Current | ICBO | | | 500 | nA | at VCB = 50 V | 2 |
| Emitter Base Cutoff Current | IEBO | | | 0.88 | mA | at VEB = 5 V | 2 |
| Collector Emitter Saturation Voltage | VCE(sat) | | | 0.3 | V | at IC = 10 mA, IB = 0.5 mA | 2 |
| Input on Voltage | VI(on) | | | 3 | V | at VCE = 0.3 V, IC = 10 mA | 2 |
| Input off Voltage | VI(off) | 0.5 | | | V | at VCE = 5 V, IC = 100 µA | 2 |
| Input Resistance | R1 | 7 | 10 | 13 | kΩ | | 2 |
| Resistance Ratio | R2 / R1 | 0.8 | 1 | 1.2 | - | | 2 |
| Collector Emitter Voltage | VCEO | | | 50 | V | | 1 |
| Input Voltage | VI | -10 | | 40 | V | | 1 |
| Collector Current | IC | | | 100 | mA | | 1 |
| Power Dissipation | Ptot | | | 150 | mW | | 1 |
| Junction Temperature | Tj | | | 150 | | | 1 |
| Storage Temperature Range | Tstg | -55 | | 150 | | | 1 |
| Thermal Resistance from Junction to Ambient | RθJA | | | 833 | /W | Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout | 1 |
## CAD (KiCad official)
- Symbol: `MMDTC114EE`
- Footprint: `Package_TO_SOT_SMD:SOT-523`
- 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `mmdtc114ee-etched.step` / `mmdtc114ee-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mmdtc114ee.step` / `mmdtc114ee.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [ST Semtech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590227057550012416) (4 pp, sha256 `196301eae74c123f`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mmdtc114ee-datasheet.pdf)